[PATCH] D117365: [InstCombine] optimize icmp-ugt-ashr

[Nadav Rotem via Phabricator via llvm-commits]

nadav created this revision.
nadav added reviewers: lebedev.ri, craig.topper, spatel.
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This diff optimizes the sequence below. Instcombine already implements this optimization for sgt, and this patch adds support ugt.

  define i64 @src(i64 %a) {
  %1 = ashr exact i64 %a, 2
  %2 = icmp ugt i64 %1, 400
  %3 = zext i1 %2 to i64
  ret i64 %3
  }
   
  define i64 @tgt(i64 %a) {
  %1 = icmp ugt i64 %a, 1603
  %2 = zext i1 %1 to i64
  ret i64 %2
  }

This change is related to the optimizations in D117252 <https://reviews.llvm.org/D117252>.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D117365

Files:
  lib/Transforms/InstCombine/InstCombineCompares.cpp
  test/Transforms/InstCombine/icmp-shr-lt-gt.ll
  test/Transforms/InstCombine/icmp-shr.ll


Index: test/Transforms/InstCombine/icmp-shr.ll
===================================================================
--- test/Transforms/InstCombine/icmp-shr.ll
+++ test/Transforms/InstCombine/icmp-shr.ll
@@ -578,8 +578,7 @@
 
 define i1 @ashr_ugt_1(i4 %x) {
 ; CHECK-LABEL: @ashr_ugt_1(
-; CHECK-NEXT:    [[S:%.*]] = ashr i4 [[X:%.*]], 1
-; CHECK-NEXT:    [[R:%.*]] = icmp ugt i4 [[S]], 1
+; CHECK-NEXT:    [[R:%.*]] = icmp ugt i4 [[X:%.*]], 3
 ; CHECK-NEXT:    ret i1 [[R]]
 ;
   %s = ashr i4 %x, 1
@@ -591,8 +590,7 @@
 
 define i1 @ashr_ugt_2(i4 %x) {
 ; CHECK-LABEL: @ashr_ugt_2(
-; CHECK-NEXT:    [[S:%.*]] = ashr i4 [[X:%.*]], 1
-; CHECK-NEXT:    [[R:%.*]] = icmp ugt i4 [[S]], 2
+; CHECK-NEXT:    [[R:%.*]] = icmp ugt i4 [[X:%.*]], 5
 ; CHECK-NEXT:    ret i1 [[R]]
 ;
   %s = ashr i4 %x, 1
@@ -698,8 +696,7 @@
 
 define i1 @ashr_ugt_12(i4 %x) {
 ; CHECK-LABEL: @ashr_ugt_12(
-; CHECK-NEXT:    [[S:%.*]] = ashr i4 [[X:%.*]], 1
-; CHECK-NEXT:    [[R:%.*]] = icmp ugt i4 [[S]], -4
+; CHECK-NEXT:    [[R:%.*]] = icmp ugt i4 [[X:%.*]], -7
 ; CHECK-NEXT:    ret i1 [[R]]
 ;
   %s = ashr i4 %x, 1
@@ -711,8 +708,7 @@
 
 define i1 @ashr_ugt_13(i4 %x) {
 ; CHECK-LABEL: @ashr_ugt_13(
-; CHECK-NEXT:    [[S:%.*]] = ashr i4 [[X:%.*]], 1
-; CHECK-NEXT:    [[R:%.*]] = icmp ugt i4 [[S]], -3
+; CHECK-NEXT:    [[R:%.*]] = icmp ugt i4 [[X:%.*]], -5
 ; CHECK-NEXT:    ret i1 [[R]]
 ;
   %s = ashr i4 %x, 1
Index: test/Transforms/InstCombine/icmp-shr-lt-gt.ll
===================================================================
--- test/Transforms/InstCombine/icmp-shr-lt-gt.ll
+++ test/Transforms/InstCombine/icmp-shr-lt-gt.ll
@@ -2344,8 +2344,7 @@
 
 define i1 @ashr_ugt_noexact(i8 %x) {
 ; CHECK-LABEL: @ashr_ugt_noexact(
-; CHECK-NEXT:    [[S:%.*]] = ashr i8 [[X:%.*]], 3
-; CHECK-NEXT:    [[C:%.*]] = icmp ugt i8 [[S]], 10
+; CHECK-NEXT:    [[C:%.*]] = icmp ugt i8 [[X:%.*]], 87
 ; CHECK-NEXT:    ret i1 [[C]]
 ;
   %s = ashr i8 %x, 3
@@ -2356,8 +2355,7 @@
 
 define i1 @ashr_uge_noexact(i8 %x) {
 ; CHECK-LABEL: @ashr_uge_noexact(
-; CHECK-NEXT:    [[S:%.*]] = ashr i8 [[X:%.*]], 3
-; CHECK-NEXT:    [[C:%.*]] = icmp ugt i8 [[S]], 9
+; CHECK-NEXT:    [[C:%.*]] = icmp ugt i8 [[X:%.*]], 79
 ; CHECK-NEXT:    ret i1 [[C]]
 ;
   %s = ashr i8 %x, 3
Index: lib/Transforms/InstCombine/InstCombineCompares.cpp
===================================================================
--- lib/Transforms/InstCombine/InstCombineCompares.cpp
+++ lib/Transforms/InstCombine/InstCombineCompares.cpp
@@ -2247,8 +2247,8 @@
       if (ShiftedC.ashr(ShAmtVal) == C)
         return new ICmpInst(Pred, X, ConstantInt::get(ShrTy, ShiftedC));
     }
-    if (Pred == CmpInst::ICMP_SGT) {
-      // icmp sgt (ashr X, ShAmtC), C --> icmp sgt X, ((C + 1) << ShAmtC) - 1
+    if (Pred == CmpInst::ICMP_SGT || Pred == CmpInst::ICMP_UGT) {
+      // icmp xgt (ashr X, ShAmtC), C --> icmp xgt X, ((C + 1) << ShAmtC) - 1
       APInt ShiftedC = (C + 1).shl(ShAmtVal) - 1;
       if (!C.isMaxSignedValue() && !(C + 1).shl(ShAmtVal).isMinSignedValue() &&
           (ShiftedC + 1).ashr(ShAmtVal) == (C + 1))


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