[llvm] fc7af12 - [AMDGPU] Pre-commit test for D116469. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 14 08:55:24 PST 2022
Author: Craig Topper
Date: 2022-01-14T08:54:38-08:00
New Revision: fc7af123ddba48e53ae49af4352cb71f2a27cf89
URL: https://github.com/llvm/llvm-project/commit/fc7af123ddba48e53ae49af4352cb71f2a27cf89
DIFF: https://github.com/llvm/llvm-project/commit/fc7af123ddba48e53ae49af4352cb71f2a27cf89.diff
LOG: [AMDGPU] Pre-commit test for D116469. NFC
The multiply in this test is miscompiled to 0.
Reviewed By: foad
Differential Revision: https://reviews.llvm.org/D117280
Added:
Modified:
llvm/test/CodeGen/AMDGPU/amdgpu-mul24-knownbits.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-mul24-knownbits.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-mul24-knownbits.ll
index c7b7fc4835cc5..ce5d952408dd1 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgpu-mul24-knownbits.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgpu-mul24-knownbits.ll
@@ -29,6 +29,19 @@ entry:
ret void
}
+define i32 @f(i32 %x, i32 %y) {
+; GCN-LABEL: f:
+; GCN: ; %bb.0:
+; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GCN-NEXT: v_mov_b32_e32 v0, 0
+; GCN-NEXT: s_setpc_b64 s[30:31]
+ %xx = or i32 %x, -128 ; 0xffffff80
+ %yy = or i32 %y, -128 ; 0xffffff80
+ %r = mul i32 %xx, %yy
+ %rr = lshr i32 %r, 14
+ ret i32 %rr
+}
+
; Function Attrs: nounwind readnone speculatable
declare i32 @llvm.amdgcn.workitem.id.x() #20
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