[llvm] f417f5f - [InstCombine] add test for limitation of knownbits with overshift; NFC
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 14 08:52:53 PST 2022
Author: Sanjay Patel
Date: 2022-01-14T11:52:44-05:00
New Revision: f417f5f4633ef007c873b0cb3a7c68e9bf4cc0a6
URL: https://github.com/llvm/llvm-project/commit/f417f5f4633ef007c873b0cb3a7c68e9bf4cc0a6
DIFF: https://github.com/llvm/llvm-project/commit/f417f5f4633ef007c873b0cb3a7c68e9bf4cc0a6.diff
LOG: [InstCombine] add test for limitation of knownbits with overshift; NFC
The tests above this were added for D30781 and used to provide
coverage for a limit of knownbits, but improvements in other
transforms killed that intended purpose. This was noted because
another proposed improvement in D117110 will further reduce
those tests.
Added:
Modified:
llvm/test/Transforms/InstCombine/zext-or-icmp.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/InstCombine/zext-or-icmp.ll b/llvm/test/Transforms/InstCombine/zext-or-icmp.ll
index 1e7dda128d7a..6b7f1d029cb6 100644
--- a/llvm/test/Transforms/InstCombine/zext-or-icmp.ll
+++ b/llvm/test/Transforms/InstCombine/zext-or-icmp.ll
@@ -99,6 +99,33 @@ block2:
ret i32 %conv2
}
+; A limitation of knownbits with overshift prevents reducing to 'false'.
+
+define i1 @knownbits_out_of_range_shift(i32 %x) {
+; CHECK-LABEL: @knownbits_out_of_range_shift(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[BLOCK2:%.*]]
+; CHECK: block1:
+; CHECK-NEXT: br label [[BLOCK2]]
+; CHECK: block2:
+; CHECK-NEXT: [[P:%.*]] = phi i32 [ 63, [[ENTRY:%.*]] ], [ 31, [[BLOCK1:%.*]] ]
+; CHECK-NEXT: [[L:%.*]] = lshr i32 [[X:%.*]], [[P]]
+; CHECK-NEXT: [[R:%.*]] = icmp eq i32 [[L]], 2
+; CHECK-NEXT: ret i1 [[R]]
+;
+entry:
+ br label %block2
+
+block1:
+ br label %block2
+
+block2:
+ %p = phi i32 [ 63, %entry ], [ 31, %block1 ]
+ %l = lshr i32 %x, %p
+ %r = icmp eq i32 %l, 2
+ ret i1 %r
+}
+
; This should not end with more instructions than it started from.
define i32 @PR49475(i32 %x, i16 %y) {
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