[PATCH] D117305: [AMDGPU][MC] Corrected disassembly of s_waitcnt
Dmitry Preobrazhensky via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 14 06:05:07 PST 2022
dp created this revision.
dp added reviewers: foad, rampitec.
Herald added subscribers: kerbowa, hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, jvesely, kzhuravl, arsenm.
dp requested review of this revision.
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s_waitcnt with default expcnt, vmcnt and lgkmcnt values was disassembled without arguments. See bug 52716 <https://github.com/llvm/llvm-project/issues/52716>.
https://reviews.llvm.org/D117305
Files:
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
llvm/test/MC/AMDGPU/sopp.s
Index: llvm/test/MC/AMDGPU/sopp.s
===================================================================
--- llvm/test/MC/AMDGPU/sopp.s
+++ llvm/test/MC/AMDGPU/sopp.s
@@ -81,31 +81,31 @@
// GCN: s_waitcnt vmcnt(9) ; encoding: [0x79,0x0f,0x8c,0xbf]
s_waitcnt vmcnt(15)
-// GCN: s_waitcnt ; encoding: [0x7f,0x0f,0x8c,0xbf]
+// GCN: s_waitcnt vmcnt(15) expcnt(7) lgkmcnt(15) ; encoding: [0x7f,0x0f,0x8c,0xbf]
s_waitcnt vmcnt_sat(9)
// GCN: s_waitcnt vmcnt(9) ; encoding: [0x79,0x0f,0x8c,0xbf]
s_waitcnt vmcnt_sat(15)
-// GCN: s_waitcnt ; encoding: [0x7f,0x0f,0x8c,0xbf]
+// GCN: s_waitcnt vmcnt(15) expcnt(7) lgkmcnt(15) ; encoding: [0x7f,0x0f,0x8c,0xbf]
s_waitcnt vmcnt_sat(16)
-// GCN: s_waitcnt ; encoding: [0x7f,0x0f,0x8c,0xbf]
+// GCN: s_waitcnt vmcnt(15) expcnt(7) lgkmcnt(15) ; encoding: [0x7f,0x0f,0x8c,0xbf]
s_waitcnt expcnt(2)
// GCN: s_waitcnt expcnt(2) ; encoding: [0x2f,0x0f,0x8c,0xbf]
s_waitcnt expcnt(7)
-// GCN: s_waitcnt ; encoding: [0x7f,0x0f,0x8c,0xbf]
+// GCN: s_waitcnt vmcnt(15) expcnt(7) lgkmcnt(15) ; encoding: [0x7f,0x0f,0x8c,0xbf]
s_waitcnt expcnt_sat(2)
// GCN: s_waitcnt expcnt(2) ; encoding: [0x2f,0x0f,0x8c,0xbf]
s_waitcnt expcnt_sat(7)
-// GCN: s_waitcnt ; encoding: [0x7f,0x0f,0x8c,0xbf]
+// GCN: s_waitcnt vmcnt(15) expcnt(7) lgkmcnt(15) ; encoding: [0x7f,0x0f,0x8c,0xbf]
s_waitcnt expcnt_sat(0xFFFF0000)
-// GCN: s_waitcnt ; encoding: [0x7f,0x0f,0x8c,0xbf]
+// GCN: s_waitcnt vmcnt(15) expcnt(7) lgkmcnt(15) ; encoding: [0x7f,0x0f,0x8c,0xbf]
s_waitcnt lgkmcnt(3)
// GCN: s_waitcnt lgkmcnt(3) ; encoding: [0x7f,0x03,0x8c,0xbf]
@@ -114,7 +114,7 @@
// GCN: s_waitcnt lgkmcnt(9) ; encoding: [0x7f,0x09,0x8c,0xbf]
s_waitcnt lgkmcnt(15)
-// GCN: s_waitcnt ; encoding: [0x7f,0x0f,0x8c,0xbf]
+// GCN: s_waitcnt vmcnt(15) expcnt(7) lgkmcnt(15) ; encoding: [0x7f,0x0f,0x8c,0xbf]
s_waitcnt vmcnt(0), expcnt(0)
// GCN: s_waitcnt vmcnt(0) expcnt(0) ; encoding: [0x00,0x0f,0x8c,0xbf]
@@ -126,10 +126,10 @@
// GCN: s_waitcnt lgkmcnt(9) ; encoding: [0x7f,0x09,0x8c,0xbf]
s_waitcnt lgkmcnt_sat(15)
-// GCN: s_waitcnt ; encoding: [0x7f,0x0f,0x8c,0xbf]
+// GCN: s_waitcnt vmcnt(15) expcnt(7) lgkmcnt(15) ; encoding: [0x7f,0x0f,0x8c,0xbf]
s_waitcnt lgkmcnt_sat(16)
-// GCN: s_waitcnt ; encoding: [0x7f,0x0f,0x8c,0xbf]
+// GCN: s_waitcnt vmcnt(15) expcnt(7) lgkmcnt(15) ; encoding: [0x7f,0x0f,0x8c,0xbf]
x=1
s_waitcnt lgkmcnt_sat(x+1)
Index: llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
+++ llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
@@ -1397,21 +1397,26 @@
unsigned Vmcnt, Expcnt, Lgkmcnt;
decodeWaitcnt(ISA, SImm16, Vmcnt, Expcnt, Lgkmcnt);
+ bool IsDefaultVmcnt = Vmcnt == getVmcntBitMask(ISA);
+ bool IsDefaultExpcnt = Expcnt == getExpcntBitMask(ISA);
+ bool IsDefaultLgkmcnt = Lgkmcnt == getLgkmcntBitMask(ISA);
+ bool PrintAll = IsDefaultVmcnt && IsDefaultExpcnt && IsDefaultLgkmcnt;
+
bool NeedSpace = false;
- if (Vmcnt != getVmcntBitMask(ISA)) {
+ if (!IsDefaultVmcnt || PrintAll) {
O << "vmcnt(" << Vmcnt << ')';
NeedSpace = true;
}
- if (Expcnt != getExpcntBitMask(ISA)) {
+ if (!IsDefaultExpcnt || PrintAll) {
if (NeedSpace)
O << ' ';
O << "expcnt(" << Expcnt << ')';
NeedSpace = true;
}
- if (Lgkmcnt != getLgkmcntBitMask(ISA)) {
+ if (!IsDefaultLgkmcnt || PrintAll) {
if (NeedSpace)
O << ' ';
O << "lgkmcnt(" << Lgkmcnt << ')';
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