[PATCH] D117079: [RISCV] Improve i64 splat vector lowering in RV32.
    Craig Topper via Phabricator via llvm-commits 
    llvm-commits at lists.llvm.org
       
    Thu Jan 13 19:23:13 PST 2022
    
    
  
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:2229
+    if (LoC == HiC && Const && Const->getSExtValue() == RISCV::VLMaxSentinel) {
+      MVT InterVT = MVT::getVectorVT(MVT::i32, 2 * VT.getVectorMinNumElements(),
+                                     VT.isScalableVector());
----------------
jacquesguan wrote:
> craig.topper wrote:
> > Can this be `MVT::getVectorVT(MVT::i32, 2 * VT.getVectorElementCount())` as I wrote in my previous comment. If not please tell me why not.
> It can not, because the return type of `getVectorElementCount` is `ElementCount`, and the operator `*` is not overloaded for it.
`VT.getVectorElementCount() * 2` work? I think the operator overload is there but maybe not symmetric.
Repository:
  rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D117079/new/
https://reviews.llvm.org/D117079
    
    
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