[PATCH] D116794: [JITLink] Add RISCV label subtraction and addition relocations

[Lang Hames via Phabricator via llvm-commits]

lhames accepted this revision.
lhames added a comment.
This revision is now accepted and ready to land.

I think this will need an update for the `JITTargetAddress` -> `ExecutorAddr` switch in `118e953b18f`, but otherwise LGTM. Thanks Stephen!



================
Comment at: llvm/include/llvm/ExecutionEngine/JITLink/riscv.h:90
+  /// Fixup expression:
+  ///   Fixup <- (Targat - *{8}Fixup + Addend)
+  R_RISCV_ADD64,
----------------
Typo: Targat should be Target.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D116794/new/

https://reviews.llvm.org/D116794