[PATCH] D117243: [AMDGPU] Ensure return address is save/restored around the call with IPRA enabled/disabled

[Venkata Ramanaiah Nalamothu via Phabricator via llvm-commits]

RamNalamothu created this revision.
RamNalamothu added reviewers: arsenm, scott.linder, t-tye, sebastian-ne, kzhuravl.
Herald added subscribers: kerbowa, tpr, dstuttard, yaxunl, nhaehnle, jvesely.
RamNalamothu requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
Herald added a project: LLVM.

Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D117243

Files:
  llvm/test/CodeGen/AMDGPU/ipra.ll


Index: llvm/test/CodeGen/AMDGPU/ipra.ll
===================================================================
--- llvm/test/CodeGen/AMDGPU/ipra.ll
+++ llvm/test/CodeGen/AMDGPU/ipra.ll
@@ -105,5 +105,31 @@
   ret void
 }
 
+define weak amdgpu_kernel void @wombat(i32* %arg, i32* %arg2) {
+bb:
+  call void @hoge() #0
+  ret void
+}
+
+; Make sure we save/restore the return address around the call.
+; Function Attrs: norecurse
+define internal void @hoge() #2 {
+bb:
+; GCN-LABEL: {{^}}hoge:
+; GCN-DAG: v_writelane_b32 [[CSR_VGPR:v[0-9]+]], s30,
+; GCN-DAG: v_writelane_b32 [[CSR_VGPR]], s31,
+; GCN: s_swappc_b64 s[30:31]
+; GCN-DAG: v_readlane_b32 s4, [[CSR_VGPR]],
+; GCN-DAG: v_readlane_b32 s5, [[CSR_VGPR]],
+; GCN: s_waitcnt vmcnt(0)
+; GCN: s_setpc_b64 s[4:5]
+  call void @eggs()
+  ret void
+}
+
+declare dso_local void @eggs()
+
+
 attributes #0 = { nounwind }
 attributes #1 = { nounwind noinline "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" }
+attributes #2 = { norecurse }


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D117243.399754.patch
Type: text/x-patch
Size: 1018 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220113/e3b5c5c7/attachment.bin>