[PATCH] D117227: [RISCV][NFC] Use TableGen 'foreach' to simplify repetitive CSR definitions

Thu Jan 13 08:13:00 PST 2022

asb added inline comments.

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Comment at: llvm/lib/Target/RISCV/RISCVSystemOperands.td:269-292
 def : SysReg<"pmpcfg0", 0x3A0>;
 let isRV32Only = 1 in
 def : SysReg<"pmpcfg1", 0x3A1>;
 def : SysReg<"pmpcfg2", 0x3A2>;
 let isRV32Only = 1 in
 def : SysReg<"pmpcfg3", 0x3A3>;
 def : SysReg<"pmpcfg4", 0x3A4>;
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achieveartificialintelligence wrote:
> I think `pmpcfg` can also be compressed.
It could, but I wasn't convinced it would be an improvement given the interleaving of the RV32-only odd registers along with the RV32/RV64 even registers.

Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D117227/new/

https://reviews.llvm.org/D117227