[llvm] 4f19bb6 - [X86][AVX] Add v8f32/v8i32 01289abc test case
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 13 03:38:05 PST 2022
Author: Simon Pilgrim
Date: 2022-01-13T11:37:49Z
New Revision: 4f19bb6f28d2fda01f098bc1e93c74fa1ffa24ae
URL: https://github.com/llvm/llvm-project/commit/4f19bb6f28d2fda01f098bc1e93c74fa1ffa24ae
DIFF: https://github.com/llvm/llvm-project/commit/4f19bb6f28d2fda01f098bc1e93c74fa1ffa24ae.diff
LOG: [X86][AVX] Add v8f32/v8i32 01289abc test case
Blend Insertion + Element Rotation pattern similar to Issue #53124
Added:
Modified:
llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll b/llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
index 657fc9dac655b..34ff47edf18aa 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
@@ -1399,6 +1399,34 @@ define <8 x float> @shuffle_v8f32_0189abcd(<8 x float> %a, <8 x float> %b) {
ret <8 x float> %shuffle
}
+define <8 x float> @shuffle_v8f32_01289abc(<8 x float> %a, <8 x float> %b) {
+; AVX1-LABEL: shuffle_v8f32_01289abc:
+; AVX1: # %bb.0:
+; AVX1-NEXT: vpermilps {{.*#+}} xmm2 = xmm1[0,0,0,0]
+; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
+; AVX1-NEXT: vblendps {{.*#+}} xmm1 = xmm3[0],xmm1[1,2,3]
+; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[1,2,3,0]
+; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1
+; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1,2],ymm1[3,4,5,6,7]
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: shuffle_v8f32_01289abc:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vmovaps {{.*#+}} ymm2 = <u,u,u,0,1,2,3,4>
+; AVX2-NEXT: vpermps %ymm1, %ymm2, %ymm1
+; AVX2-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1,2],ymm1[3,4,5,6,7]
+; AVX2-NEXT: retq
+;
+; AVX512VL-LABEL: shuffle_v8f32_01289abc:
+; AVX512VL: # %bb.0:
+; AVX512VL-NEXT: vmovaps {{.*#+}} ymm2 = [8,9,10,0,1,2,3,4]
+; AVX512VL-NEXT: vpermi2ps %ymm0, %ymm1, %ymm2
+; AVX512VL-NEXT: vmovaps %ymm2, %ymm0
+; AVX512VL-NEXT: retq
+ %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 1, i32 2, i32 8, i32 9, i32 10, i32 11, i32 12>
+ ret <8 x float> %shuffle
+}
+
define <8 x float> @shuffle_v8f32_uuuu1111(<8 x float> %a, <8 x float> %b) {
; ALL-LABEL: shuffle_v8f32_uuuu1111:
; ALL: # %bb.0:
@@ -2923,6 +2951,45 @@ define <8 x i32> @shuffle_v8i32_0189abcd(<8 x i32> %a, <8 x i32> %b) {
ret <8 x i32> %shuffle
}
+define <8 x i32> @shuffle_v8i32_01289abc(<8 x i32> %a, <8 x i32> %b) {
+; AVX1-LABEL: shuffle_v8i32_01289abc:
+; AVX1: # %bb.0:
+; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
+; AVX1-NEXT: vpalignr {{.*#+}} xmm2 = xmm1[4,5,6,7,8,9,10,11,12,13,14,15],xmm2[0,1,2,3]
+; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
+; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1
+; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1,2],ymm1[3,4,5,6,7]
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: shuffle_v8i32_01289abc:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vmovaps {{.*#+}} ymm2 = <u,u,u,0,1,2,3,4>
+; AVX2-NEXT: vpermps %ymm1, %ymm2, %ymm1
+; AVX2-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1,2],ymm1[3,4,5,6,7]
+; AVX2-NEXT: retq
+;
+; AVX512VL-SLOW-LABEL: shuffle_v8i32_01289abc:
+; AVX512VL-SLOW: # %bb.0:
+; AVX512VL-SLOW-NEXT: valignd {{.*#+}} ymm1 = ymm1[5,6,7,0,1,2,3,4]
+; AVX512VL-SLOW-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2],ymm1[3,4,5,6,7]
+; AVX512VL-SLOW-NEXT: retq
+;
+; AVX512VL-FAST-ALL-LABEL: shuffle_v8i32_01289abc:
+; AVX512VL-FAST-ALL: # %bb.0:
+; AVX512VL-FAST-ALL-NEXT: vmovdqa {{.*#+}} ymm2 = [8,9,10,0,1,2,3,4]
+; AVX512VL-FAST-ALL-NEXT: vpermi2d %ymm0, %ymm1, %ymm2
+; AVX512VL-FAST-ALL-NEXT: vmovdqa %ymm2, %ymm0
+; AVX512VL-FAST-ALL-NEXT: retq
+;
+; AVX512VL-FAST-PERLANE-LABEL: shuffle_v8i32_01289abc:
+; AVX512VL-FAST-PERLANE: # %bb.0:
+; AVX512VL-FAST-PERLANE-NEXT: valignd {{.*#+}} ymm1 = ymm1[5,6,7,0,1,2,3,4]
+; AVX512VL-FAST-PERLANE-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2],ymm1[3,4,5,6,7]
+; AVX512VL-FAST-PERLANE-NEXT: retq
+ %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 0, i32 1, i32 2, i32 8, i32 9, i32 10, i32 11, i32 12>
+ ret <8 x i32> %shuffle
+}
+
define <8 x i32> @shuffle_v8i32_zuu8zuuc(<8 x i32> %a) {
; AVX1-LABEL: shuffle_v8i32_zuu8zuuc:
; AVX1: # %bb.0:
More information about the llvm-commits
mailing list