[PATCH] D117188: [RISCV] Add patterns for vector widening integer add/subtract

[Jianjian Guan via Phabricator via llvm-commits]

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Add patterns for vector widening integer add/subtract instructions


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D117188

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfo.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
  llvm/test/CodeGen/RISCV/rvv/vwadd-sdnode.ll

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