[PATCH] D117060: [RISCV] Add RISCVProcFamilyEnum and add SiFive7.

[Michael Berg via Phabricator via llvm-commits]

mcberg2021 accepted this revision.
mcberg2021 added a comment.
This revision is now accepted and ready to land.

Nice and its extensible too for future targets under the query function with processor model mapping the family grouping.  By and large LGTM.  Lets see what folks think...


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D117060/new/

https://reviews.llvm.org/D117060