[PATCH] D116832: [UpdateLLCTestChecks] Allow replacing register names with variables

[Sebastian Neubauer via Phabricator via llvm-commits]

sebastian-ne added a comment.

The implementation looks fine to me, but I’m not sure what the goal is.

The only advantage I see is that if the register allocation changes, the test still passes without needing changes.
But, I find the checks with regexes hard to read. The length of the regex doesn’t improve the readability either.
The names for the matches are generated from the register names, so if the register allocation changed in some commit (though the test keeps passing) and someone re-generates the test later, all the match names change – possibly on a commit that is unrelated to the one that changed the register allocation.

Using `<instruction name>+<counter>` like the MIR-check script does could alleviate the second issue.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D116832/new/

https://reviews.llvm.org/D116832