[PATCH] D117022: [ARM] Remove FeaturePerfMon from armv7-m
Dave Green via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 11 06:36:11 PST 2022
dmgreen created this revision.
dmgreen added reviewers: lenary, mubashar_, t.p.northover.
Herald added subscribers: hiraditya, kristof.beyls.
dmgreen requested review of this revision.
Herald added a project: LLVM.
FeaturePerfMon relates to the PMU extensions available in armv7-a, and should not be available in v7-m (it requires loading from a system register with a mrc). Sink it down a level in the dependency map so that it isn't present in ARMv7m or HasV8MMainlineOps.
It is also removed from the Neoverse-N2, as it will already be transitively included.
https://reviews.llvm.org/D117022
Files:
llvm/lib/Target/ARM/ARM.td
llvm/test/CodeGen/ARM/readcyclecounter.ll
Index: llvm/test/CodeGen/ARM/readcyclecounter.ll
===================================================================
--- llvm/test/CodeGen/ARM/readcyclecounter.ll
+++ llvm/test/CodeGen/ARM/readcyclecounter.ll
@@ -1,6 +1,7 @@
; RUN: llc -mtriple=armv7-none-linux-gnueabi < %s | FileCheck %s
; RUN: llc -mtriple=thumbv7-none-linux-gnueabi < %s | FileCheck %s
; RUN: llc -mtriple=armv7-none-linux-gnueabi -mattr=-perfmon < %s | FileCheck %s --check-prefix=CHECK-NO-PERFMON
+; RUN: llc -mtriple=armv7m-none-linux-gnueabi < %s | FileCheck %s --check-prefix=CHECK-NO-PERFMON
; RUN: llc -mtriple=armv6-none-linux-gnueabi < %s | FileCheck %s --check-prefix=CHECK-NO-PERFMON
; The performance monitor we're looking for is an ARMv7 extension. It should be
Index: llvm/lib/Target/ARM/ARM.td
===================================================================
--- llvm/lib/Target/ARM/ARM.td
+++ llvm/lib/Target/ARM/ARM.td
@@ -512,8 +512,7 @@
def HasV7Ops : SubtargetFeature<"v7", "HasV7Ops", "true",
"Support ARM v7 instructions",
- [HasV6T2Ops, FeaturePerfMon,
- FeatureV7Clrex]>;
+ [HasV6T2Ops, FeatureV7Clrex]>;
def HasV8MMainlineOps :
SubtargetFeature<"v8m.main", "HasV8MMainlineOps", "true",
@@ -522,7 +521,7 @@
def HasV8Ops : SubtargetFeature<"v8", "HasV8Ops", "true",
"Support ARM v8 instructions",
- [HasV7Ops, FeatureAcquireRelease]>;
+ [HasV7Ops, FeaturePerfMon, FeatureAcquireRelease]>;
def HasV8_1aOps : SubtargetFeature<"v8.1a", "HasV8_1aOps", "true",
"Support ARM v8.1a instructions",
@@ -765,7 +764,8 @@
FeatureNEON,
FeatureDB,
FeatureDSP,
- FeatureAClass]>;
+ FeatureAClass,
+ FeaturePerfMon]>;
def ARMv7ve : Architecture<"armv7ve", "ARMv7ve", [HasV7Ops,
FeatureNEON,
@@ -774,13 +774,15 @@
FeatureTrustZone,
FeatureMP,
FeatureVirtualization,
- FeatureAClass]>;
+ FeatureAClass,
+ FeaturePerfMon]>;
def ARMv7r : Architecture<"armv7-r", "ARMv7r", [HasV7Ops,
FeatureDB,
FeatureDSP,
FeatureHWDivThumb,
- FeatureRClass]>;
+ FeatureRClass,
+ FeaturePerfMon]>;
def ARMv7m : Architecture<"armv7-m", "ARMv7m", [HasV7Ops,
FeatureThumb2,
@@ -1459,8 +1461,7 @@
def : ProcNoItin<"neoverse-n2", [ARMv85a,
FeatureBF16,
- FeatureMatMulInt8,
- FeaturePerfMon]>;
+ FeatureMatMulInt8]>;
def : ProcessorModel<"cyclone", SwiftModel, [ARMv8a, ProcSwift,
FeatureHasRetAddrStack,
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