[PATCH] D116435: [RISCV] Generate 32 bits jumptable entries when code model is small

[Wang Pengcheng via Phabricator via llvm-commits]

pcwang-thead added a comment.

In D116435#3226574 <https://reviews.llvm.org/D116435#3226574>, @pcwang-thead wrote:

> In D116435#3225279 <https://reviews.llvm.org/D116435#3225279>, @jrtc27 wrote:
>
>> AArch64 does even better and has a PC-relative jump table lowering whose element size depends on how big your switch is, not the code model in use. Ideally this would be made target-independent, or at least copied to RISC-V. That'd let you have small entries even for medany RV64.
>
> Thanks for your advice!
>
> It seems that AArch64 has a pass called `AArch64CompressJumpTables` to do this, I may add it to RISCV later (or make it a target-independent pass).

It may take some time to do these changes, so I will land this patch first.


Repository:
  rG LLVM Github Monorepo

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https://reviews.llvm.org/D116435