[llvm] 301e911 - [TargetLowering] precommit refactor from D115688 NFC

Nick Desaulniers via llvm-commits llvm-commits at lists.llvm.org
Mon Jan 10 18:32:20 PST 2022


Author: Nick Desaulniers
Date: 2022-01-10T18:32:13-08:00
New Revision: 301e9117400269489e39eabf2fcf8204bd7355d1

URL: https://github.com/llvm/llvm-project/commit/301e9117400269489e39eabf2fcf8204bd7355d1
DIFF: https://github.com/llvm/llvm-project/commit/301e9117400269489e39eabf2fcf8204bd7355d1.diff

LOG: [TargetLowering] precommit refactor from D115688 NFC

Signed-off-by: Nick Desaulniers <ndesaulniers at google.com>

Added: 
    

Modified: 
    llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index b1ab4df62461e..6af296d15dfd2 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -4603,9 +4603,7 @@ void TargetLowering::LowerAsmOperandForConstraint(SDValue Op,
   case 'n':    // Simple Integer
   case 's': {  // Relocatable Constant
 
-    GlobalAddressSDNode *GA;
     ConstantSDNode *C;
-    BlockAddressSDNode *BA;
     uint64_t Offset = 0;
 
     // Match (GA) or (C) or (GA+C) or (GA-C) or ((GA+C)+C) or (((GA+C)+C)+C),
@@ -4614,12 +4612,6 @@ void TargetLowering::LowerAsmOperandForConstraint(SDValue Op,
     // while in this case the GA may be furthest from the root node which is
     // likely an ISD::ADD.
     while (true) {
-      if ((GA = dyn_cast<GlobalAddressSDNode>(Op)) && ConstraintLetter != 'n') {
-        Ops.push_back(DAG.getTargetGlobalAddress(GA->getGlobal(), SDLoc(Op),
-                                                 GA->getValueType(0),
-                                                 Offset + GA->getOffset()));
-        return;
-      }
       if ((C = dyn_cast<ConstantSDNode>(Op)) && ConstraintLetter != 's') {
         // gcc prints these as sign extended.  Sign extend value to 64 bits
         // now; without this it would get ZExt'd later in
@@ -4634,11 +4626,19 @@ void TargetLowering::LowerAsmOperandForConstraint(SDValue Op,
             DAG.getTargetConstant(Offset + ExtVal, SDLoc(C), MVT::i64));
         return;
       }
-      if ((BA = dyn_cast<BlockAddressSDNode>(Op)) && ConstraintLetter != 'n') {
-        Ops.push_back(DAG.getTargetBlockAddress(
-            BA->getBlockAddress(), BA->getValueType(0),
-            Offset + BA->getOffset(), BA->getTargetFlags()));
-        return;
+      if (ConstraintLetter != 'n') {
+        if (const auto *GA = dyn_cast<GlobalAddressSDNode>(Op)) {
+          Ops.push_back(DAG.getTargetGlobalAddress(GA->getGlobal(), SDLoc(Op),
+                GA->getValueType(0),
+                Offset + GA->getOffset()));
+          return;
+        }
+        if (const auto *BA = dyn_cast<BlockAddressSDNode>(Op)) {
+          Ops.push_back(DAG.getTargetBlockAddress(
+                BA->getBlockAddress(), BA->getValueType(0),
+                Offset + BA->getOffset(), BA->getTargetFlags()));
+          return;
+        }
       }
       const unsigned OpCode = Op.getOpcode();
       if (OpCode == ISD::ADD || OpCode == ISD::SUB) {


        


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