[PATCH] D115551: [AMDGPU] Do not reserve any VGPR for SGPR spills
Ruiling, Song via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 10 17:33:47 PST 2022
ruiling added inline comments.
================
Comment at: llvm/test/CodeGen/AMDGPU/sgpr-spills-split-regalloc.ll:212
+
+define void @spill_sgpr_no_free_vgpr(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) #0 {
%a = load <4 x i32>, <4 x i32> addrspace(1)* %in
----------------
I don't quite understand the patch, but this is an obvious regression. the generated code is pretty bad for this case. Is there any possible way to still use vgpr for sgpr spill for such kind of case?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D115551/new/
https://reviews.llvm.org/D115551
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