[PATCH] D106237: [ISel] Port AArch64 HADD and RHADD to ISel

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:1351
+    if (HasInt256) {
+      setOperationAction(ISD::AVGCEILU, MVT::v16i16, Legal);
+      setOperationAction(ISD::AVGCEILU, MVT::v32i8,  Legal);
----------------
These can be custom lowered on AVX1 targets by splitting, but I'm OK with just a TODO for now.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:1654
+    if (HasBWI) {
+      setOperationAction(ISD::AVGCEILU, MVT::v32i16, Legal);
+      setOperationAction(ISD::AVGCEILU, MVT::v64i8,  Legal);
----------------
These can be custom lowered on non-AVX512BW targets by splitting, but I'm OK with just a TODO for now.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D106237/new/

https://reviews.llvm.org/D106237