[llvm] 7b39dcc - [Attributor][FIX] Ensure "IsExact" is false for non-exact accesses
Johannes Doerfert via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 10 08:14:54 PST 2022
Author: Johannes Doerfert
Date: 2022-01-10T10:09:36-06:00
New Revision: 7b39dccbe4d67697bd3710aaa54a5d5644129ce7
URL: https://github.com/llvm/llvm-project/commit/7b39dccbe4d67697bd3710aaa54a5d5644129ce7
DIFF: https://github.com/llvm/llvm-project/commit/7b39dccbe4d67697bd3710aaa54a5d5644129ce7.diff
LOG: [Attributor][FIX] Ensure "IsExact" is false for non-exact accesses
If we look at potentially interfering accesses we need to ensure the
"IsExact" flag is set appropriately. Accesses that have an "unknown"
size or offset cannot be exact matches and we missed to flag that.
Error and test reported by Serguei N. Dmitriev.
Added:
Modified:
llvm/lib/Transforms/IPO/AttributorAttributes.cpp
llvm/test/Transforms/Attributor/value-simplify-pointer-info.ll
Removed:
################################################################################
diff --git a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp
index a78517425fd0a..8779d7dd9bc7a 100644
--- a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp
+++ b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp
@@ -810,14 +810,17 @@ struct AA::PointerInfo::OffsetAndSize : public std::pair<int64_t, int64_t> {
int64_t getSize() const { return second; }
static OffsetAndSize getUnknown() { return OffsetAndSize(Unknown, Unknown); }
+ /// Return true if offset or size are unknown.
+ bool offsetOrSizeAreUnknown() const {
+ return getOffset() == OffsetAndSize::Unknown ||
+ getSize() == OffsetAndSize::Unknown;
+ }
+
/// Return true if this offset and size pair might describe an address that
/// overlaps with \p OAS.
bool mayOverlap(const OffsetAndSize &OAS) const {
// Any unknown value and we are giving up -> overlap.
- if (OAS.getOffset() == OffsetAndSize::Unknown ||
- OAS.getSize() == OffsetAndSize::Unknown ||
- getOffset() == OffsetAndSize::Unknown ||
- getSize() == OffsetAndSize::Unknown)
+ if (offsetOrSizeAreUnknown() || OAS.offsetOrSizeAreUnknown())
return true;
// Check if one offset point is in the other interval [offset, offset+size].
@@ -1024,8 +1027,9 @@ struct AA::PointerInfo::State : public AbstractState {
OffsetAndSize ItOAS = It.getFirst();
if (!OAS.mayOverlap(ItOAS))
continue;
+ bool IsExact = OAS == ItOAS && !OAS.offsetOrSizeAreUnknown();
for (auto &Access : It.getSecond())
- if (!CB(Access, OAS == ItOAS))
+ if (!CB(Access, IsExact))
return false;
}
return true;
diff --git a/llvm/test/Transforms/Attributor/value-simplify-pointer-info.ll b/llvm/test/Transforms/Attributor/value-simplify-pointer-info.ll
index f1300c59512ae..4734fc9081a00 100644
--- a/llvm/test/Transforms/Attributor/value-simplify-pointer-info.ll
+++ b/llvm/test/Transforms/Attributor/value-simplify-pointer-info.ll
@@ -116,7 +116,7 @@ define void @local_alloca_simplifiable_1(%struct.S* noalias sret(%struct.S) alig
; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[S:%.*]] = alloca [[STRUCT_S]], align 4
; IS__TUNIT_OPM-NEXT: [[I:%.*]] = bitcast %struct.S* [[S]] to i8*
-; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I]]) #[[ATTR10:[0-9]+]]
+; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I]]) #[[ATTR11:[0-9]+]]
; IS__TUNIT_OPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3
; IS__TUNIT_OPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4
; IS__TUNIT_OPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 5
@@ -143,7 +143,7 @@ define void @local_alloca_simplifiable_1(%struct.S* noalias sret(%struct.S) alig
; IS__TUNIT_OPM-NEXT: [[I316:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2
; IS__TUNIT_OPM-NEXT: store i32 [[ADD15]], i32* [[I316]], align 4, !tbaa [[TBAA14:![0-9]+]]
; IS__TUNIT_OPM-NEXT: [[I12:%.*]] = bitcast %struct.S* [[S]] to i8*
-; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I12]]) #[[ATTR10]]
+; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I12]]) #[[ATTR11]]
; IS__TUNIT_OPM-NEXT: ret void
;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn
@@ -188,16 +188,16 @@ define void @local_alloca_simplifiable_1(%struct.S* noalias sret(%struct.S) alig
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[S:%.*]] = alloca [[STRUCT_S]], align 4
; IS__CGSCC_OPM-NEXT: [[I:%.*]] = bitcast %struct.S* [[S]] to i8*
-; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I]]) #[[ATTR13:[0-9]+]]
+; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I]]) #[[ATTR14:[0-9]+]]
; IS__CGSCC_OPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3
; IS__CGSCC_OPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4
; IS__CGSCC_OPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 5
; IS__CGSCC_OPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 0
-; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(24) [[I1]], i32 noundef 1) #[[ATTR14:[0-9]+]]
+; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(24) [[I1]], i32 noundef 1) #[[ATTR15:[0-9]+]]
; IS__CGSCC_OPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 1
-; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(20) [[I2]], i32 noundef 2) #[[ATTR14]]
+; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(20) [[I2]], i32 noundef 2) #[[ATTR15]]
; IS__CGSCC_OPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2
-; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(16) [[I3]], i32 noundef 3) #[[ATTR14]]
+; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(16) [[I3]], i32 noundef 3) #[[ATTR15]]
; IS__CGSCC_OPM-NEXT: [[F12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3
; IS__CGSCC_OPM-NEXT: store float 0x3FF19999A0000000, float* [[F12]], align 4, !tbaa [[TBAA7:![0-9]+]]
; IS__CGSCC_OPM-NEXT: [[MUL:%.*]] = fmul float 0x40019999A0000000, 2.000000e+00
@@ -215,7 +215,7 @@ define void @local_alloca_simplifiable_1(%struct.S* noalias sret(%struct.S) alig
; IS__CGSCC_OPM-NEXT: [[I316:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2
; IS__CGSCC_OPM-NEXT: store i32 [[ADD15]], i32* [[I316]], align 4, !tbaa [[TBAA14:![0-9]+]]
; IS__CGSCC_OPM-NEXT: [[I12:%.*]] = bitcast %struct.S* [[S]] to i8*
-; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I12]]) #[[ATTR13]]
+; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I12]]) #[[ATTR14]]
; IS__CGSCC_OPM-NEXT: ret void
;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn
@@ -546,7 +546,7 @@ define void @local_alloca_simplifiable_2() {
; IS__CGSCC_OPM-NEXT: store i8 0, i8* [[ARRAYIDX25]], align 1, !tbaa [[TBAA15]]
; IS__CGSCC_OPM-NEXT: [[ARRAYIDX26:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 500
; IS__CGSCC_OPM-NEXT: [[I22:%.*]] = bitcast i8* [[ARRAYIDX26]] to i32*
-; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nofree noundef nonnull writeonly align 4 dereferenceable(4) [[I22]], i32 noundef 0) #[[ATTR15:[0-9]+]]
+; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nofree noundef nonnull writeonly align 4 dereferenceable(4) [[I22]], i32 noundef 0) #[[ATTR16:[0-9]+]]
; IS__CGSCC_OPM-NEXT: br label [[FOR_COND28:%.*]]
; IS__CGSCC_OPM: for.cond28:
; IS__CGSCC_OPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC36:%.*]] ], [ 0, [[FOR_END24]] ]
@@ -826,7 +826,7 @@ define i32 @multi_obj_simplifiable_1(i32 %cnd) {
; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[L:%.*]] = alloca i32, align 4
; IS__TUNIT_OPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8*
-; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR10]]
+; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR11]]
; IS__TUNIT_OPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[CND]], 0
; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL_NOT]], label [[COND_FALSE:%.*]], label [[COND_TRUE:%.*]]
; IS__TUNIT_OPM: cond.true:
@@ -835,7 +835,7 @@ define i32 @multi_obj_simplifiable_1(i32 %cnd) {
; IS__TUNIT_OPM-NEXT: br label [[COND_END]]
; IS__TUNIT_OPM: cond.end:
; IS__TUNIT_OPM-NEXT: [[I2:%.*]] = bitcast i32* [[L]] to i8*
-; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I2]]) #[[ATTR10]]
+; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I2]]) #[[ATTR11]]
; IS__TUNIT_OPM-NEXT: ret i32 5
;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn
@@ -862,7 +862,7 @@ define i32 @multi_obj_simplifiable_1(i32 %cnd) {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[L:%.*]] = alloca i32, align 4
; IS__CGSCC_OPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8*
-; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR13]]
+; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR14]]
; IS__CGSCC_OPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[CND]], 0
; IS__CGSCC_OPM-NEXT: br i1 [[TOBOOL_NOT]], label [[COND_FALSE:%.*]], label [[COND_TRUE:%.*]]
; IS__CGSCC_OPM: cond.true:
@@ -871,7 +871,7 @@ define i32 @multi_obj_simplifiable_1(i32 %cnd) {
; IS__CGSCC_OPM-NEXT: br label [[COND_END]]
; IS__CGSCC_OPM: cond.end:
; IS__CGSCC_OPM-NEXT: [[I2:%.*]] = bitcast i32* [[L]] to i8*
-; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I2]]) #[[ATTR13]]
+; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I2]]) #[[ATTR14]]
; IS__CGSCC_OPM-NEXT: ret i32 5
;
; IS__CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
@@ -930,7 +930,7 @@ define i32 @multi_obj_simplifiable_2(i32 %cnd) {
; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[L:%.*]] = alloca i32, align 4
; IS__TUNIT_OPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8*
-; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR10]]
+; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR11]]
; IS__TUNIT_OPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[CND]], 0
; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL_NOT]], label [[COND_FALSE:%.*]], label [[COND_TRUE:%.*]]
; IS__TUNIT_OPM: cond.true:
@@ -939,7 +939,7 @@ define i32 @multi_obj_simplifiable_2(i32 %cnd) {
; IS__TUNIT_OPM-NEXT: br label [[COND_END]]
; IS__TUNIT_OPM: cond.end:
; IS__TUNIT_OPM-NEXT: [[I1:%.*]] = bitcast i32* [[L]] to i8*
-; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR10]]
+; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR11]]
; IS__TUNIT_OPM-NEXT: ret i32 5
;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn
@@ -966,7 +966,7 @@ define i32 @multi_obj_simplifiable_2(i32 %cnd) {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[L:%.*]] = alloca i32, align 4
; IS__CGSCC_OPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8*
-; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR13]]
+; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR14]]
; IS__CGSCC_OPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[CND]], 0
; IS__CGSCC_OPM-NEXT: br i1 [[TOBOOL_NOT]], label [[COND_FALSE:%.*]], label [[COND_TRUE:%.*]]
; IS__CGSCC_OPM: cond.true:
@@ -975,7 +975,7 @@ define i32 @multi_obj_simplifiable_2(i32 %cnd) {
; IS__CGSCC_OPM-NEXT: br label [[COND_END]]
; IS__CGSCC_OPM: cond.end:
; IS__CGSCC_OPM-NEXT: [[I1:%.*]] = bitcast i32* [[L]] to i8*
-; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR13]]
+; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR14]]
; IS__CGSCC_OPM-NEXT: ret i32 5
;
; IS__CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
@@ -1091,9 +1091,9 @@ define void @static_global_simplifiable_1(%struct.S* noalias sret(%struct.S) ali
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@static_global_simplifiable_1
; IS__CGSCC_OPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]]) #[[ATTR4:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry:
-; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(24) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i32 0, i32 0), i32 noundef 1) #[[ATTR14]]
-; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(20) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 1), i32 noundef 2) #[[ATTR14]]
-; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(16) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 2), i32 noundef 3) #[[ATTR14]]
+; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(24) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i32 0, i32 0), i32 noundef 1) #[[ATTR15]]
+; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(20) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 1), i32 noundef 2) #[[ATTR15]]
+; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(16) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 2), i32 noundef 3) #[[ATTR15]]
; IS__CGSCC_OPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3
; IS__CGSCC_OPM-NEXT: store float 0x3FF19999A0000000, float* [[F1]], align 4, !tbaa [[TBAA7]]
; IS__CGSCC_OPM-NEXT: [[MUL:%.*]] = fmul float 0x40019999A0000000, 2.000000e+00
@@ -1378,7 +1378,7 @@ define void @static_global_simplifiable_2() {
; IS__CGSCC_OPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP26:![0-9]+]]
; IS__CGSCC_OPM: for.end23:
; IS__CGSCC_OPM-NEXT: store i8 0, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @GBytes, i64 0, i64 1023), align 1, !tbaa [[TBAA15]]
-; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nofree noundef nonnull writeonly align 4 dereferenceable(4) bitcast (i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @GBytes, i64 0, i64 500) to i32*), i32 noundef 0) #[[ATTR15]]
+; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nofree noundef nonnull writeonly align 4 dereferenceable(4) bitcast (i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @GBytes, i64 0, i64 500) to i32*), i32 noundef 0) #[[ATTR16]]
; IS__CGSCC_OPM-NEXT: br label [[FOR_COND25:%.*]]
; IS__CGSCC_OPM: for.cond25:
; IS__CGSCC_OPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC33:%.*]] ], [ 0, [[FOR_END23]] ]
@@ -1725,11 +1725,11 @@ define void @noalias_arg_simplifiable_1(%struct.S* noalias sret(%struct.S) align
; IS__CGSCC_OPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 5
; IS__CGSCC_OPM-NEXT: store float 0x400A666660000000, float* [[F3]], align 4, !tbaa [[TBAA11]]
; IS__CGSCC_OPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 0
-; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 8 dereferenceable(24) [[I1]], i32 noundef 1) #[[ATTR14]]
+; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 8 dereferenceable(24) [[I1]], i32 noundef 1) #[[ATTR15]]
; IS__CGSCC_OPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 1
-; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(20) [[I2]], i32 noundef 2) #[[ATTR14]]
+; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(20) [[I2]], i32 noundef 2) #[[ATTR15]]
; IS__CGSCC_OPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2
-; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 8 dereferenceable(16) [[I3]], i32 noundef 3) #[[ATTR14]]
+; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 8 dereferenceable(16) [[I3]], i32 noundef 3) #[[ATTR15]]
; IS__CGSCC_OPM-NEXT: [[F11:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3
; IS__CGSCC_OPM-NEXT: [[I:%.*]] = load float, float* [[F11]], align 4, !tbaa [[TBAA7]]
; IS__CGSCC_OPM-NEXT: [[F12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3
@@ -2096,7 +2096,7 @@ define void @noalias_arg_simplifiable_2(i8* %Bytes) {
; IS__CGSCC_OPM-NEXT: store i8 0, i8* [[ARRAYIDX24]], align 1, !tbaa [[TBAA15]]
; IS__CGSCC_OPM-NEXT: [[ARRAYIDX25:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 500
; IS__CGSCC_OPM-NEXT: [[I21:%.*]] = bitcast i8* [[ARRAYIDX25]] to i32*
-; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nofree noundef nonnull writeonly align 4 dereferenceable(4) [[I21]], i32 noundef 0) #[[ATTR15]]
+; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nofree noundef nonnull writeonly align 4 dereferenceable(4) [[I21]], i32 noundef 0) #[[ATTR16]]
; IS__CGSCC_OPM-NEXT: br label [[FOR_COND27:%.*]]
; IS__CGSCC_OPM: for.cond27:
; IS__CGSCC_OPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC35:%.*]] ], [ 0, [[FOR_END23]] ]
@@ -2308,9 +2308,9 @@ define i32 @local_alloca_not_simplifiable_1() {
; IS__TUNIT_OPM-NEXT: [[X:%.*]] = alloca i32, align 4
; IS__TUNIT_OPM-NEXT: [[Y:%.*]] = alloca i32, align 4
; IS__TUNIT_OPM-NEXT: [[I:%.*]] = bitcast i32* [[X]] to i8*
-; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR10]]
+; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR11]]
; IS__TUNIT_OPM-NEXT: [[I1:%.*]] = bitcast i32* [[Y]] to i8*
-; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR10]]
+; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR11]]
; IS__TUNIT_OPM-NEXT: store i32 1, i32* [[Y]], align 4, !tbaa [[TBAA3]]
; IS__TUNIT_OPM-NEXT: store i32 1, i32* [[X]], align 4, !tbaa [[TBAA3]]
; IS__TUNIT_OPM-NEXT: [[I2:%.*]] = bitcast i32* [[X]] to i8*
@@ -2358,9 +2358,9 @@ define i32 @local_alloca_not_simplifiable_1() {
; IS__CGSCC_OPM-NEXT: [[X:%.*]] = alloca i32, align 4
; IS__CGSCC_OPM-NEXT: [[Y:%.*]] = alloca i32, align 4
; IS__CGSCC_OPM-NEXT: [[I:%.*]] = bitcast i32* [[X]] to i8*
-; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR13]]
+; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR14]]
; IS__CGSCC_OPM-NEXT: [[I1:%.*]] = bitcast i32* [[Y]] to i8*
-; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR13]]
+; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR14]]
; IS__CGSCC_OPM-NEXT: store i32 1, i32* [[Y]], align 4, !tbaa [[TBAA3]]
; IS__CGSCC_OPM-NEXT: store i32 1, i32* [[X]], align 4, !tbaa [[TBAA3]]
; IS__CGSCC_OPM-NEXT: [[I2:%.*]] = bitcast i32* [[X]] to i8*
@@ -3364,12 +3364,12 @@ define dso_local i32 @round_trip_malloc(i32 %x) {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@round_trip_malloc
; IS__TUNIT_OPM-SAME: (i32 [[X:%.*]]) {
; IS__TUNIT_OPM-NEXT: entry:
-; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 noundef 4) #[[ATTR11:[0-9]+]]
+; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 noundef 4) #[[ATTR12:[0-9]+]]
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__TUNIT_OPM-NEXT: store i32 [[X]], i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP0]] to i8*
-; IS__TUNIT_OPM-NEXT: call void @free(i8* noundef [[TMP2]]) #[[ATTR11]]
+; IS__TUNIT_OPM-NEXT: call void @free(i8* noundef [[TMP2]]) #[[ATTR12]]
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP1]]
;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@round_trip_malloc
@@ -3415,12 +3415,12 @@ entry:
define dso_local i32 @round_trip_malloc_constant() {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@round_trip_malloc_constant() {
; IS__TUNIT_OPM-NEXT: entry:
-; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 noundef 4) #[[ATTR11]]
+; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 noundef 4) #[[ATTR12]]
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__TUNIT_OPM-NEXT: store i32 7, i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP0]] to i8*
-; IS__TUNIT_OPM-NEXT: call void @free(i8* noundef [[TMP2]]) #[[ATTR11]]
+; IS__TUNIT_OPM-NEXT: call void @free(i8* noundef [[TMP2]]) #[[ATTR12]]
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP1]]
;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@round_trip_malloc_constant() {
@@ -3463,7 +3463,7 @@ define dso_local i32 @conditional_malloc(i32 %x) {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@conditional_malloc
; IS__TUNIT_OPM-SAME: (i32 [[X:%.*]]) {
; IS__TUNIT_OPM-NEXT: entry:
-; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 noundef 4) #[[ATTR11]]
+; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 noundef 4) #[[ATTR12]]
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__TUNIT_OPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0
; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
@@ -3536,7 +3536,7 @@ define dso_local i32 @round_trip_calloc(i32 %x) {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@round_trip_calloc
; IS__TUNIT_OPM-SAME: (i32 [[X:%.*]]) {
; IS__TUNIT_OPM-NEXT: entry:
-; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 4, i64 noundef 1) #[[ATTR11]]
+; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 4, i64 noundef 1) #[[ATTR12]]
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__TUNIT_OPM-NEXT: store i32 [[X]], i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
@@ -3586,7 +3586,7 @@ entry:
define dso_local i32 @round_trip_calloc_constant() {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@round_trip_calloc_constant() {
; IS__TUNIT_OPM-NEXT: entry:
-; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 4, i64 noundef 1) #[[ATTR11]]
+; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 4, i64 noundef 1) #[[ATTR12]]
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__TUNIT_OPM-NEXT: store i32 11, i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
@@ -3638,7 +3638,7 @@ define dso_local i32 @conditional_calloc(i32 %x) {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@conditional_calloc
; IS__TUNIT_OPM-SAME: (i32 [[X:%.*]]) {
; IS__TUNIT_OPM-NEXT: entry:
-; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 1, i64 noundef 4) #[[ATTR11]]
+; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 1, i64 noundef 4) #[[ATTR12]]
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__TUNIT_OPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0
; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
@@ -3648,7 +3648,7 @@ define dso_local i32 @conditional_calloc(i32 %x) {
; IS__TUNIT_OPM: if.end:
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP0]] to i8*
-; IS__TUNIT_OPM-NEXT: call void @free(i8* [[TMP2]]) #[[ATTR11]]
+; IS__TUNIT_OPM-NEXT: call void @free(i8* [[TMP2]]) #[[ATTR12]]
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP1]]
;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@conditional_calloc
@@ -3722,7 +3722,7 @@ define dso_local i32 @conditional_calloc_zero(i1 %c) {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@conditional_calloc_zero
; IS__TUNIT_OPM-SAME: (i1 [[C:%.*]]) {
; IS__TUNIT_OPM-NEXT: entry:
-; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 1, i64 noundef 4) #[[ATTR11]]
+; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 1, i64 noundef 4) #[[ATTR12]]
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__TUNIT_OPM: if.then:
@@ -3731,7 +3731,7 @@ define dso_local i32 @conditional_calloc_zero(i1 %c) {
; IS__TUNIT_OPM: if.end:
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP0]] to i8*
-; IS__TUNIT_OPM-NEXT: call void @free(i8* [[TMP2]]) #[[ATTR11]]
+; IS__TUNIT_OPM-NEXT: call void @free(i8* [[TMP2]]) #[[ATTR12]]
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP1]]
;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@conditional_calloc_zero
@@ -3796,7 +3796,7 @@ define dso_local i32* @malloc_like(i32 %s) {
; IS__TUNIT_OPM-SAME: (i32 [[S:%.*]]) {
; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[CONV:%.*]] = sext i32 [[S]] to i64
-; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 [[CONV]]) #[[ATTR11]]
+; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 [[CONV]]) #[[ATTR12]]
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__TUNIT_OPM-NEXT: ret i32* [[TMP0]]
;
@@ -3837,11 +3837,11 @@ define dso_local i32 @round_trip_malloc_like(i32 %x) {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@round_trip_malloc_like
; IS__TUNIT_OPM-SAME: (i32 [[X:%.*]]) {
; IS__TUNIT_OPM-NEXT: entry:
-; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call i32* @malloc_like(i32 noundef 4) #[[ATTR11]]
+; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call i32* @malloc_like(i32 noundef 4) #[[ATTR12]]
; IS__TUNIT_OPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8*
-; IS__TUNIT_OPM-NEXT: call void @free(i8* noundef [[TMP1]]) #[[ATTR11]]
+; IS__TUNIT_OPM-NEXT: call void @free(i8* noundef [[TMP1]]) #[[ATTR12]]
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP0]]
;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@round_trip_malloc_like
@@ -3889,11 +3889,11 @@ define dso_local i32 @round_trip_unknown_alloc(i32 %x) {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@round_trip_unknown_alloc
; IS__TUNIT_OPM-SAME: (i32 [[X:%.*]]) {
; IS__TUNIT_OPM-NEXT: entry:
-; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call i32* @unknown_alloc(i32 noundef 4) #[[ATTR11]]
+; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call i32* @unknown_alloc(i32 noundef 4) #[[ATTR12]]
; IS__TUNIT_OPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8*
-; IS__TUNIT_OPM-NEXT: call void @free(i8* noundef [[TMP1]]) #[[ATTR11]]
+; IS__TUNIT_OPM-NEXT: call void @free(i8* noundef [[TMP1]]) #[[ATTR12]]
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP0]]
;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@round_trip_unknown_alloc
@@ -3943,7 +3943,7 @@ define dso_local i32 @conditional_unknown_alloc(i32 %x) {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@conditional_unknown_alloc
; IS__TUNIT_OPM-SAME: (i32 [[X:%.*]]) {
; IS__TUNIT_OPM-NEXT: entry:
-; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i32* @unknown_alloc(i32 noundef 4) #[[ATTR11]]
+; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i32* @unknown_alloc(i32 noundef 4) #[[ATTR12]]
; IS__TUNIT_OPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0
; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__TUNIT_OPM: if.then:
@@ -3952,7 +3952,7 @@ define dso_local i32 @conditional_unknown_alloc(i32 %x) {
; IS__TUNIT_OPM: if.end:
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8*
-; IS__TUNIT_OPM-NEXT: call void @free(i8* [[TMP1]]) #[[ATTR11]]
+; IS__TUNIT_OPM-NEXT: call void @free(i8* [[TMP1]]) #[[ATTR12]]
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP0]]
;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@conditional_unknown_alloc
@@ -4037,7 +4037,7 @@ define dso_local void @test_nested_memory(float* %dst, double* %src) {
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[SRC2]] to double**
; IS__TUNIT_OPM-NEXT: store double* [[SRC]], double** [[TMP0]], align 8
; IS__TUNIT_OPM-NEXT: store i8* [[CALL]], i8** bitcast (%struct.STy** getelementptr inbounds ([[STRUCT_STY]], %struct.STy* @global, i64 0, i32 2) to i8**), align 8
-; IS__TUNIT_OPM-NEXT: call fastcc void @nested_memory_callee(%struct.STy* noalias nocapture nofree noundef nonnull readonly align 8 dereferenceable(24) [[LOCAL]]) #[[ATTR12:[0-9]+]]
+; IS__TUNIT_OPM-NEXT: call fastcc void @nested_memory_callee(%struct.STy* noalias nocapture nofree noundef nonnull readonly align 8 dereferenceable(24) [[LOCAL]]) #[[ATTR13:[0-9]+]]
; IS__TUNIT_OPM-NEXT: ret void
;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@test_nested_memory
@@ -4076,7 +4076,7 @@ define dso_local void @test_nested_memory(float* %dst, double* %src) {
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[SRC2]] to double**
; IS__CGSCC_OPM-NEXT: store double* [[SRC]], double** [[TMP1]], align 8
; IS__CGSCC_OPM-NEXT: store i8* [[CALL]], i8** bitcast (%struct.STy** getelementptr inbounds ([[STRUCT_STY]], %struct.STy* @global, i64 0, i32 2) to i8**), align 8
-; IS__CGSCC_OPM-NEXT: call fastcc void @nested_memory_callee(%struct.STy* noalias nocapture nofree noundef nonnull readonly align 8 dereferenceable(24) [[LOCAL]]) #[[ATTR16:[0-9]+]]
+; IS__CGSCC_OPM-NEXT: call fastcc void @nested_memory_callee(%struct.STy* noalias nocapture nofree noundef nonnull readonly align 8 dereferenceable(24) [[LOCAL]]) #[[ATTR17:[0-9]+]]
; IS__CGSCC_OPM-NEXT: ret void
;
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test_nested_memory
@@ -4206,6 +4206,228 @@ entry:
ret void
}
+; Make sure the access %1 is not forwarded to the loads %2 and %3 as the indices are
+; varying and the accesses thus not "exact". This used to simplify %cmp12 to true.
+define hidden void @no_propagation_of_unknown_index_access(i32* %in, i32* %out, i32 %idx) #0 {
+; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind
+; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@no_propagation_of_unknown_index_access
+; IS__TUNIT_OPM-SAME: (i32* nocapture nofree readonly [[IN:%.*]], i32* nocapture nofree writeonly [[OUT:%.*]], i32 [[IDX:%.*]]) #[[ATTR10:[0-9]+]] {
+; IS__TUNIT_OPM-NEXT: entry:
+; IS__TUNIT_OPM-NEXT: [[BUF:%.*]] = alloca [128 x i32], align 16
+; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast [128 x i32]* [[BUF]] to i8*
+; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 512, i8* nocapture nofree noundef nonnull align 16 dereferenceable(512) [[TMP0]])
+; IS__TUNIT_OPM-NEXT: br label [[FOR_COND:%.*]]
+; IS__TUNIT_OPM: for.cond:
+; IS__TUNIT_OPM-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ]
+; IS__TUNIT_OPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 128
+; IS__TUNIT_OPM-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
+; IS__TUNIT_OPM: for.cond.cleanup:
+; IS__TUNIT_OPM-NEXT: br label [[FOR_COND4:%.*]]
+; IS__TUNIT_OPM: for.body:
+; IS__TUNIT_OPM-NEXT: [[IDXPROM:%.*]] = sext i32 [[I_0]] to i64
+; IS__TUNIT_OPM-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[IN]], i64 [[IDXPROM]]
+; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
+; IS__TUNIT_OPM-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM]]
+; IS__TUNIT_OPM-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX2]], align 4
+; IS__TUNIT_OPM-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
+; IS__TUNIT_OPM-NEXT: br label [[FOR_COND]], !llvm.loop [[TBAA10]]
+; IS__TUNIT_OPM: for.cond4:
+; IS__TUNIT_OPM-NEXT: [[I3_0:%.*]] = phi i32 [ 0, [[FOR_COND_CLEANUP]] ], [ [[INC16:%.*]], [[FOR_BODY7:%.*]] ]
+; IS__TUNIT_OPM-NEXT: [[CMP5:%.*]] = icmp slt i32 [[I3_0]], 128
+; IS__TUNIT_OPM-NEXT: br i1 [[CMP5]], label [[FOR_BODY7]], label [[FOR_COND_CLEANUP6:%.*]]
+; IS__TUNIT_OPM: for.cond.cleanup6:
+; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 512, i8* nocapture nofree noundef nonnull align 16 dereferenceable(512) [[TMP0]])
+; IS__TUNIT_OPM-NEXT: ret void
+; IS__TUNIT_OPM: for.body7:
+; IS__TUNIT_OPM-NEXT: [[IDXPROM8:%.*]] = sext i32 [[I3_0]] to i64
+; IS__TUNIT_OPM-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM8]]
+; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX9]], align 4
+; IS__TUNIT_OPM-NEXT: [[IDXPROM10:%.*]] = sext i32 [[IDX]] to i64
+; IS__TUNIT_OPM-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM10]]
+; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX11]], align 4
+; IS__TUNIT_OPM-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]]
+; IS__TUNIT_OPM-NEXT: [[CONV:%.*]] = zext i1 [[CMP12]] to i32
+; IS__TUNIT_OPM-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds i32, i32* [[OUT]], i64 [[IDXPROM8]]
+; IS__TUNIT_OPM-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX14]], align 4
+; IS__TUNIT_OPM-NEXT: [[INC16]] = add nsw i32 [[I3_0]], 1
+; IS__TUNIT_OPM-NEXT: br label [[FOR_COND4]], !llvm.loop [[TBAA12]]
+;
+; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn
+; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@no_propagation_of_unknown_index_access
+; IS__TUNIT_NPM-SAME: (i32* nocapture nofree readonly [[IN:%.*]], i32* nocapture nofree writeonly [[OUT:%.*]], i32 [[IDX:%.*]]) #[[ATTR1]] {
+; IS__TUNIT_NPM-NEXT: entry:
+; IS__TUNIT_NPM-NEXT: [[BUF:%.*]] = alloca [128 x i32], align 16
+; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = bitcast [128 x i32]* [[BUF]] to i8*
+; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 512, i8* nocapture nofree noundef nonnull align 16 dereferenceable(512) [[TMP0]]) #[[ATTR9]]
+; IS__TUNIT_NPM-NEXT: br label [[FOR_COND:%.*]]
+; IS__TUNIT_NPM: for.cond:
+; IS__TUNIT_NPM-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ]
+; IS__TUNIT_NPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 128
+; IS__TUNIT_NPM-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
+; IS__TUNIT_NPM: for.cond.cleanup:
+; IS__TUNIT_NPM-NEXT: br label [[FOR_COND4:%.*]]
+; IS__TUNIT_NPM: for.body:
+; IS__TUNIT_NPM-NEXT: [[IDXPROM:%.*]] = sext i32 [[I_0]] to i64
+; IS__TUNIT_NPM-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[IN]], i64 [[IDXPROM]]
+; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
+; IS__TUNIT_NPM-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM]]
+; IS__TUNIT_NPM-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX2]], align 4
+; IS__TUNIT_NPM-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
+; IS__TUNIT_NPM-NEXT: br label [[FOR_COND]], !llvm.loop [[TBAA10]]
+; IS__TUNIT_NPM: for.cond4:
+; IS__TUNIT_NPM-NEXT: [[I3_0:%.*]] = phi i32 [ 0, [[FOR_COND_CLEANUP]] ], [ [[INC16:%.*]], [[FOR_BODY7:%.*]] ]
+; IS__TUNIT_NPM-NEXT: [[CMP5:%.*]] = icmp slt i32 [[I3_0]], 128
+; IS__TUNIT_NPM-NEXT: br i1 [[CMP5]], label [[FOR_BODY7]], label [[FOR_COND_CLEANUP6:%.*]]
+; IS__TUNIT_NPM: for.cond.cleanup6:
+; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 512, i8* nocapture nofree noundef nonnull align 16 dereferenceable(512) [[TMP0]]) #[[ATTR9]]
+; IS__TUNIT_NPM-NEXT: ret void
+; IS__TUNIT_NPM: for.body7:
+; IS__TUNIT_NPM-NEXT: [[IDXPROM8:%.*]] = sext i32 [[I3_0]] to i64
+; IS__TUNIT_NPM-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM8]]
+; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX9]], align 4
+; IS__TUNIT_NPM-NEXT: [[IDXPROM10:%.*]] = sext i32 [[IDX]] to i64
+; IS__TUNIT_NPM-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM10]]
+; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX11]], align 4
+; IS__TUNIT_NPM-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]]
+; IS__TUNIT_NPM-NEXT: [[CONV:%.*]] = zext i1 [[CMP12]] to i32
+; IS__TUNIT_NPM-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds i32, i32* [[OUT]], i64 [[IDXPROM8]]
+; IS__TUNIT_NPM-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX14]], align 4
+; IS__TUNIT_NPM-NEXT: [[INC16]] = add nsw i32 [[I3_0]], 1
+; IS__TUNIT_NPM-NEXT: br label [[FOR_COND4]], !llvm.loop [[TBAA12]]
+;
+; IS__CGSCC_OPM: Function Attrs: argmemonly nofree nosync nounwind
+; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@no_propagation_of_unknown_index_access
+; IS__CGSCC_OPM-SAME: (i32* nocapture nofree readonly [[IN:%.*]], i32* nocapture nofree writeonly [[OUT:%.*]], i32 [[IDX:%.*]]) #[[ATTR13:[0-9]+]] {
+; IS__CGSCC_OPM-NEXT: entry:
+; IS__CGSCC_OPM-NEXT: [[BUF:%.*]] = alloca [128 x i32], align 16
+; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast [128 x i32]* [[BUF]] to i8*
+; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 512, i8* nocapture nofree noundef nonnull align 16 dereferenceable(512) [[TMP0]])
+; IS__CGSCC_OPM-NEXT: br label [[FOR_COND:%.*]]
+; IS__CGSCC_OPM: for.cond:
+; IS__CGSCC_OPM-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ]
+; IS__CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 128
+; IS__CGSCC_OPM-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
+; IS__CGSCC_OPM: for.cond.cleanup:
+; IS__CGSCC_OPM-NEXT: br label [[FOR_COND4:%.*]]
+; IS__CGSCC_OPM: for.body:
+; IS__CGSCC_OPM-NEXT: [[IDXPROM:%.*]] = sext i32 [[I_0]] to i64
+; IS__CGSCC_OPM-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[IN]], i64 [[IDXPROM]]
+; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
+; IS__CGSCC_OPM-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM]]
+; IS__CGSCC_OPM-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX2]], align 4
+; IS__CGSCC_OPM-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
+; IS__CGSCC_OPM-NEXT: br label [[FOR_COND]], !llvm.loop [[TBAA10]]
+; IS__CGSCC_OPM: for.cond4:
+; IS__CGSCC_OPM-NEXT: [[I3_0:%.*]] = phi i32 [ 0, [[FOR_COND_CLEANUP]] ], [ [[INC16:%.*]], [[FOR_BODY7:%.*]] ]
+; IS__CGSCC_OPM-NEXT: [[CMP5:%.*]] = icmp slt i32 [[I3_0]], 128
+; IS__CGSCC_OPM-NEXT: br i1 [[CMP5]], label [[FOR_BODY7]], label [[FOR_COND_CLEANUP6:%.*]]
+; IS__CGSCC_OPM: for.cond.cleanup6:
+; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 512, i8* nocapture nofree noundef nonnull align 16 dereferenceable(512) [[TMP0]])
+; IS__CGSCC_OPM-NEXT: ret void
+; IS__CGSCC_OPM: for.body7:
+; IS__CGSCC_OPM-NEXT: [[IDXPROM8:%.*]] = sext i32 [[I3_0]] to i64
+; IS__CGSCC_OPM-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM8]]
+; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX9]], align 4
+; IS__CGSCC_OPM-NEXT: [[IDXPROM10:%.*]] = sext i32 [[IDX]] to i64
+; IS__CGSCC_OPM-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM10]]
+; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX11]], align 4
+; IS__CGSCC_OPM-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]]
+; IS__CGSCC_OPM-NEXT: [[CONV:%.*]] = zext i1 [[CMP12]] to i32
+; IS__CGSCC_OPM-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds i32, i32* [[OUT]], i64 [[IDXPROM8]]
+; IS__CGSCC_OPM-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX14]], align 4
+; IS__CGSCC_OPM-NEXT: [[INC16]] = add nsw i32 [[I3_0]], 1
+; IS__CGSCC_OPM-NEXT: br label [[FOR_COND4]], !llvm.loop [[TBAA12]]
+;
+; IS__CGSCC_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn
+; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@no_propagation_of_unknown_index_access
+; IS__CGSCC_NPM-SAME: (i32* nocapture nofree readonly [[IN:%.*]], i32* nocapture nofree writeonly [[OUT:%.*]], i32 [[IDX:%.*]]) #[[ATTR1]] {
+; IS__CGSCC_NPM-NEXT: entry:
+; IS__CGSCC_NPM-NEXT: [[BUF:%.*]] = alloca [128 x i32], align 16
+; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = bitcast [128 x i32]* [[BUF]] to i8*
+; IS__CGSCC_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 512, i8* nocapture nofree noundef nonnull align 16 dereferenceable(512) [[TMP0]]) #[[ATTR12]]
+; IS__CGSCC_NPM-NEXT: br label [[FOR_COND:%.*]]
+; IS__CGSCC_NPM: for.cond:
+; IS__CGSCC_NPM-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ]
+; IS__CGSCC_NPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 128
+; IS__CGSCC_NPM-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
+; IS__CGSCC_NPM: for.cond.cleanup:
+; IS__CGSCC_NPM-NEXT: br label [[FOR_COND4:%.*]]
+; IS__CGSCC_NPM: for.body:
+; IS__CGSCC_NPM-NEXT: [[IDXPROM:%.*]] = sext i32 [[I_0]] to i64
+; IS__CGSCC_NPM-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[IN]], i64 [[IDXPROM]]
+; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
+; IS__CGSCC_NPM-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM]]
+; IS__CGSCC_NPM-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX2]], align 4
+; IS__CGSCC_NPM-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
+; IS__CGSCC_NPM-NEXT: br label [[FOR_COND]], !llvm.loop [[TBAA10]]
+; IS__CGSCC_NPM: for.cond4:
+; IS__CGSCC_NPM-NEXT: [[I3_0:%.*]] = phi i32 [ 0, [[FOR_COND_CLEANUP]] ], [ [[INC16:%.*]], [[FOR_BODY7:%.*]] ]
+; IS__CGSCC_NPM-NEXT: [[CMP5:%.*]] = icmp slt i32 [[I3_0]], 128
+; IS__CGSCC_NPM-NEXT: br i1 [[CMP5]], label [[FOR_BODY7]], label [[FOR_COND_CLEANUP6:%.*]]
+; IS__CGSCC_NPM: for.cond.cleanup6:
+; IS__CGSCC_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 512, i8* nocapture nofree noundef nonnull align 16 dereferenceable(512) [[TMP0]]) #[[ATTR12]]
+; IS__CGSCC_NPM-NEXT: ret void
+; IS__CGSCC_NPM: for.body7:
+; IS__CGSCC_NPM-NEXT: [[IDXPROM8:%.*]] = sext i32 [[I3_0]] to i64
+; IS__CGSCC_NPM-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM8]]
+; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX9]], align 4
+; IS__CGSCC_NPM-NEXT: [[IDXPROM10:%.*]] = sext i32 [[IDX]] to i64
+; IS__CGSCC_NPM-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM10]]
+; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX11]], align 4
+; IS__CGSCC_NPM-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]]
+; IS__CGSCC_NPM-NEXT: [[CONV:%.*]] = zext i1 [[CMP12]] to i32
+; IS__CGSCC_NPM-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds i32, i32* [[OUT]], i64 [[IDXPROM8]]
+; IS__CGSCC_NPM-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX14]], align 4
+; IS__CGSCC_NPM-NEXT: [[INC16]] = add nsw i32 [[I3_0]], 1
+; IS__CGSCC_NPM-NEXT: br label [[FOR_COND4]], !llvm.loop [[TBAA12]]
+;
+entry:
+ %buf = alloca [128 x i32], align 16
+ %0 = bitcast [128 x i32]* %buf to i8*
+ call void @llvm.lifetime.start.p0i8(i64 512, i8* %0) #2
+ br label %for.cond
+
+for.cond: ; preds = %for.body, %entry
+ %i.0 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
+ %cmp = icmp slt i32 %i.0, 128
+ br i1 %cmp, label %for.body, label %for.cond.cleanup
+
+for.cond.cleanup: ; preds = %for.cond
+ br label %for.cond4
+
+for.body: ; preds = %for.cond
+ %idxprom = sext i32 %i.0 to i64
+ %arrayidx = getelementptr inbounds i32, i32* %in, i64 %idxprom
+ %1 = load i32, i32* %arrayidx, align 4
+ %arrayidx2 = getelementptr inbounds [128 x i32], [128 x i32]* %buf, i64 0, i64 %idxprom
+ store i32 %1, i32* %arrayidx2, align 4
+ %inc = add nsw i32 %i.0, 1
+ br label %for.cond, !llvm.loop !10
+
+for.cond4: ; preds = %for.body7, %for.cond.cleanup
+ %i3.0 = phi i32 [ 0, %for.cond.cleanup ], [ %inc16, %for.body7 ]
+ %cmp5 = icmp slt i32 %i3.0, 128
+ br i1 %cmp5, label %for.body7, label %for.cond.cleanup6
+
+for.cond.cleanup6: ; preds = %for.cond4
+ call void @llvm.lifetime.end.p0i8(i64 512, i8* %0) #2
+ ret void
+
+for.body7: ; preds = %for.cond4
+ %idxprom8 = sext i32 %i3.0 to i64
+ %arrayidx9 = getelementptr inbounds [128 x i32], [128 x i32]* %buf, i64 0, i64 %idxprom8
+ %2 = load i32, i32* %arrayidx9, align 4
+ %idxprom10 = sext i32 %idx to i64
+ %arrayidx11 = getelementptr inbounds [128 x i32], [128 x i32]* %buf, i64 0, i64 %idxprom10
+ %3 = load i32, i32* %arrayidx11, align 4
+ %cmp12 = icmp sle i32 %2, %3
+ %conv = zext i1 %cmp12 to i32
+ %arrayidx14 = getelementptr inbounds i32, i32* %out, i64 %idxprom8
+ store i32 %conv, i32* %arrayidx14, align 4
+ %inc16 = add nsw i32 %i3.0, 1
+ br label %for.cond4, !llvm.loop !12
+}
+
!llvm.module.flags = !{!0, !1}
!llvm.ident = !{!2}
@@ -4252,9 +4474,10 @@ entry:
; IS__TUNIT_OPM: attributes #[[ATTR7]] = { nofree nosync nounwind readonly willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR8]] = { nofree nosync nounwind readnone }
; IS__TUNIT_OPM: attributes #[[ATTR9]] = { nofree norecurse nosync nounwind uwtable willreturn }
-; IS__TUNIT_OPM: attributes #[[ATTR10]] = { willreturn }
-; IS__TUNIT_OPM: attributes #[[ATTR11]] = { norecurse }
-; IS__TUNIT_OPM: attributes #[[ATTR12]] = { nounwind }
+; IS__TUNIT_OPM: attributes #[[ATTR10]] = { argmemonly nofree nosync nounwind }
+; IS__TUNIT_OPM: attributes #[[ATTR11]] = { willreturn }
+; IS__TUNIT_OPM: attributes #[[ATTR12]] = { norecurse }
+; IS__TUNIT_OPM: attributes #[[ATTR13]] = { nounwind }
;.
; IS__TUNIT_NPM: attributes #[[ATTR0]] = { argmemonly nofree nosync nounwind willreturn writeonly }
; IS__TUNIT_NPM: attributes #[[ATTR1]] = { argmemonly nofree nosync nounwind willreturn }
@@ -4282,10 +4505,11 @@ entry:
; IS__CGSCC_OPM: attributes #[[ATTR10]] = { nofree norecurse nosync nounwind writeonly }
; IS__CGSCC_OPM: attributes #[[ATTR11]] = { norecurse }
; IS__CGSCC_OPM: attributes #[[ATTR12]] = { nofree norecurse nosync nounwind uwtable willreturn }
-; IS__CGSCC_OPM: attributes #[[ATTR13]] = { willreturn }
-; IS__CGSCC_OPM: attributes #[[ATTR14]] = { nounwind willreturn writeonly }
-; IS__CGSCC_OPM: attributes #[[ATTR15]] = { nounwind writeonly }
-; IS__CGSCC_OPM: attributes #[[ATTR16]] = { nounwind }
+; IS__CGSCC_OPM: attributes #[[ATTR13]] = { argmemonly nofree nosync nounwind }
+; IS__CGSCC_OPM: attributes #[[ATTR14]] = { willreturn }
+; IS__CGSCC_OPM: attributes #[[ATTR15]] = { nounwind willreturn writeonly }
+; IS__CGSCC_OPM: attributes #[[ATTR16]] = { nounwind writeonly }
+; IS__CGSCC_OPM: attributes #[[ATTR17]] = { nounwind }
;.
; IS__CGSCC_NPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC_NPM: attributes #[[ATTR1]] = { argmemonly nofree nosync nounwind willreturn }
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