[llvm] eee993a - [AArch64][SVE] Fold predicate into compare
Cullen Rhodes via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 10 02:52:56 PST 2022
Author: Cullen Rhodes
Date: 2022-01-10T10:52:06Z
New Revision: eee993ae4cc77a00681141b044b20ebd06d2aad2
URL: https://github.com/llvm/llvm-project/commit/eee993ae4cc77a00681141b044b20ebd06d2aad2
DIFF: https://github.com/llvm/llvm-project/commit/eee993ae4cc77a00681141b044b20ebd06d2aad2.diff
LOG: [AArch64][SVE] Fold predicate into compare
Codegen of added testcase before this patch:
ptrue p0.s
cmpgt p1.s, p0/z, z0.s, z1.s
cmpge p2.s, p0/z, z2.s, z1.s
and p0.b, p0/z, p1.b, p2.b
ret
Patterns originally authored by Will Lovett.
Reviewed By: david-arm
Differential Revision: https://reviews.llvm.org/D116749
Added:
Modified:
llvm/lib/Target/AArch64/SVEInstrFormats.td
llvm/test/CodeGen/AArch64/sve-intrinsics-int-compares.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/AArch64/SVEInstrFormats.td b/llvm/lib/Target/AArch64/SVEInstrFormats.td
index bb488cd7da329..466c785557805 100644
--- a/llvm/lib/Target/AArch64/SVEInstrFormats.td
+++ b/llvm/lib/Target/AArch64/SVEInstrFormats.td
@@ -4641,6 +4641,10 @@ multiclass SVE_SETCC_Pat<CondCode cc, CondCode invcc, ValueType predvt,
(cmp $Op1, $Op2, $Op3)>;
def : Pat<(predvt (AArch64setcc_z predvt:$Op1, intvt:$Op2, intvt:$Op3, invcc)),
(cmp $Op1, $Op3, $Op2)>;
+ def : Pat<(predvt (and predvt:$Pg, (AArch64setcc_z (predvt (AArch64ptrue 31)), intvt:$Op2, intvt:$Op3, cc))),
+ (cmp $Pg, $Op2, $Op3)>;
+ def : Pat<(predvt (and predvt:$Pg, (AArch64setcc_z (predvt (AArch64ptrue 31)), intvt:$Op2, intvt:$Op3, invcc))),
+ (cmp $Pg, $Op3, $Op2)>;
}
multiclass SVE_SETCC_Pat_With_Zero<CondCode cc, CondCode invcc, ValueType predvt,
diff --git a/llvm/test/CodeGen/AArch64/sve-intrinsics-int-compares.ll b/llvm/test/CodeGen/AArch64/sve-intrinsics-int-compares.ll
index eb885035307ee..9dc807462d913 100644
--- a/llvm/test/CodeGen/AArch64/sve-intrinsics-int-compares.ll
+++ b/llvm/test/CodeGen/AArch64/sve-intrinsics-int-compares.ll
@@ -963,6 +963,39 @@ define <vscale x 4 x i1> @cmpls_wide_splat_s(<vscale x 4 x i1> %pg, <vscale x 4
ret <vscale x 4 x i1> %out
}
+; Verify general predicate is folded into the compare
+define <vscale x 4 x i1> @predicated_icmp(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, <vscale x 4 x i32> %c) {
+; CHECK-LABEL: predicated_icmp:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.s
+; CHECK-NEXT: cmpgt p0.s, p0/z, z0.s, z1.s
+; CHECK-NEXT: cmpge p0.s, p0/z, z2.s, z1.s
+; CHECK-NEXT: ret
+ %icmp1 = icmp sgt <vscale x 4 x i32> %a, %b
+ %icmp2 = icmp sle <vscale x 4 x i32> %b, %c
+ %and = and <vscale x 4 x i1> %icmp1, %icmp2
+ ret <vscale x 4 x i1> %and
+}
+
+define <vscale x 4 x i1> @predicated_icmp_unknown_lhs(<vscale x 4 x i1> %a, <vscale x 4 x i32> %b, <vscale x 4 x i32> %c) {
+; CHECK-LABEL: predicated_icmp_unknown_lhs:
+; CHECK: // %bb.0:
+; CHECK-NEXT: cmpge p0.s, p0/z, z1.s, z0.s
+; CHECK-NEXT: ret
+ %icmp = icmp sle <vscale x 4 x i32> %b, %c
+ %and = and <vscale x 4 x i1> %a, %icmp
+ ret <vscale x 4 x i1> %and
+}
+
+define <vscale x 4 x i1> @predicated_icmp_unknown_rhs(<vscale x 4 x i1> %a, <vscale x 4 x i32> %b, <vscale x 4 x i32> %c) {
+; CHECK-LABEL: predicated_icmp_unknown_rhs:
+; CHECK: // %bb.0:
+; CHECK-NEXT: cmpge p0.s, p0/z, z1.s, z0.s
+; CHECK-NEXT: ret
+ %icmp = icmp sle <vscale x 4 x i32> %b, %c
+ %and = and <vscale x 4 x i1> %icmp, %a
+ ret <vscale x 4 x i1> %and
+}
declare <vscale x 16 x i1> @llvm.aarch64.sve.cmpeq.nxv16i8(<vscale x 16 x i1>, <vscale x 16 x i8>, <vscale x 16 x i8>)
declare <vscale x 8 x i1> @llvm.aarch64.sve.cmpeq.nxv8i16(<vscale x 8 x i1>, <vscale x 8 x i16>, <vscale x 8 x i16>)
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