[PATCH] D116399: [AVR] Fix a bug of register allocation

Ben Shi via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jan 10 00:06:34 PST 2022


benshi001 added inline comments.


================
Comment at: llvm/lib/Target/AVR/AVRISelDAGToDAG.cpp:171
   // Progmem indexed loads only work in POSTINC mode.
-  if (LD->getExtensionType() != ISD::NON_EXTLOAD || AM != ISD::POST_INC) {
+  if (LD->getExtensionType() != ISD::NON_EXTLOAD ||
+      LD->getAddressingMode() != ISD::POST_INC)
----------------
benshi001 wrote:
> the previous variable `AM` is not longer used, so merge it to the `if` condition.
All changes in this function `selectIndexedProgMemLoad` are non functional changes, and they just make the code more clear.


================
Comment at: llvm/lib/Target/AVR/AVRISelDAGToDAG.cpp:184
+  case MVT::i16:
+    if (Offs == 2)
+      Opcode = AVR::LPMWRdZPi;
----------------
otherwise (Offs != 2) Opcode is still 0, which means no match.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D116399/new/

https://reviews.llvm.org/D116399



More information about the llvm-commits mailing list