[PATCH] D116895: Fix a missed opportunity to optimize consecutive stores.

Nadav Rotem via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Jan 9 09:55:29 PST 2022


nadav created this revision.
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This commit fixes a missed opportunity in merging consecutive stores. The code that searches for stores skipped the case of stores that directly connect to the root. The comment above the implementation lists this case but the code did not handle it. I found this pattern when looking into the shared_ptr destructor. GCC generates the right sequence. Here is a small repo:

int foo(int* buff) {

  buff[0] = 0;
  int x = buff[1];
  buff[1] = 0;
  return x;

}


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D116895

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/test/CodeGen/X86/MergeConsecutiveStores.ll


Index: llvm/test/CodeGen/X86/MergeConsecutiveStores.ll
===================================================================
--- llvm/test/CodeGen/X86/MergeConsecutiveStores.ll
+++ llvm/test/CodeGen/X86/MergeConsecutiveStores.ll
@@ -920,3 +920,16 @@
   ret void
 }
 
+define i32 @merge_store_load_store_seq(i32* nocapture %buff) {
+entry:
+; CHECK-LABEL: merge_store_load_store_seq:
+; CHECK:      movl 4(%rdi), %eax
+; CHECK-NEXT: movq $0, (%rdi)
+; CHECK-NEXT: retq
+
+  store i32 0, i32* %buff, align 4
+  %arrayidx1 = getelementptr inbounds i32, i32* %buff, i64 1
+  %0 = load i32, i32* %arrayidx1, align 4
+  store i32 0, i32* %arrayidx1, align 4
+  ret i32 %0
+}
Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -17218,6 +17218,10 @@
         for (auto I2 = (*I)->use_begin(), E2 = (*I)->use_end(); I2 != E2; ++I2)
           TryToAddCandidate(I2);
       }
+      // Check stores that depend on the root (e.g. Store 3 in the chart above).
+      if (I.getOperandNo() == 0 && isa<StoreSDNode>(*I)) {
+          TryToAddCandidate(I);
+      }
     }
   } else {
     for (auto I = RootNode->use_begin(), E = RootNode->use_end();


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