[PATCH] D116886: [M68k] Instruction selection to choose neg x when mul x -1 (Fix issue 48588)

[Douglas Chen via Phabricator via llvm-commits]

dougpuob updated this revision to Diff 398437.
dougpuob added a comment.

- Remove braces for single line if statements.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D116886/new/

https://reviews.llvm.org/D116886

Files:
  llvm/lib/Target/M68k/M68kISelDAGToDAG.cpp
  llvm/test/CodeGen/M68k/Arith/imul-neg.ll


Index: llvm/test/CodeGen/M68k/Arith/imul-neg.ll
===================================================================
--- llvm/test/CodeGen/M68k/Arith/imul-neg.ll
+++ llvm/test/CodeGen/M68k/Arith/imul-neg.ll
@@ -1,14 +1,12 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=m68k-linux | FileCheck %s
-; FIXME: When using SelectionDAGISel, the following cases use
-; `sub` rather than the expected `neg`
 
 define i32 @mul4294967295_32(i32 %A) {
 ; CHECK-LABEL: mul4294967295_32:
 ; CHECK:         .cfi_startproc
 ; CHECK-NEXT:  ; %bb.0:
-; CHECK-NEXT:    move.l #0, %d0
-; CHECK-NEXT:    sub.l (4,%sp), %d0
+; CHECK-NEXT:    move.l	(4,%sp), %d0
+; CHECK-NEXT:    neg.l	%d0
 ; CHECK-NEXT:    rts
     %mul = mul i32 %A, 4294967295
     ret i32 %mul
@@ -19,10 +17,10 @@
 ; CHECK-LABEL: mul18446744073709551615_64:
 ; CHECK:         .cfi_startproc
 ; CHECK-NEXT:  ; %bb.0:
-; CHECK-NEXT:    move.l (4,%sp), %d0
-; CHECK-NEXT:    move.l #0, %d1
-; CHECK-NEXT:    sub.l (8,%sp), %d1
-; CHECK-NEXT:    negx.l %d0
+; CHECK-NEXT:    move.l	(4,%sp), %d0
+; CHECK-NEXT:    move.l	(8,%sp), %d1
+; CHECK-NEXT:    neg.l	%d1
+; CHECK-NEXT:    negx.l	%d0
 ; CHECK-NEXT:    rts
     %mul = mul i64 %A, 18446744073709551615
     ret i64 %mul
Index: llvm/lib/Target/M68k/M68kISelDAGToDAG.cpp
===================================================================
--- llvm/lib/Target/M68k/M68kISelDAGToDAG.cpp
+++ llvm/lib/Target/M68k/M68kISelDAGToDAG.cpp
@@ -181,6 +181,7 @@
   }
 
   bool runOnMachineFunction(MachineFunction &MF) override;
+  bool IsProfitableToFold(SDValue N, SDNode *U, SDNode *Root) const override;
 
 private:
   /// Keep a pointer to the M68kSubtarget around so that we can
@@ -311,6 +312,29 @@
 };
 } // namespace
 
+bool M68kDAGToDAGISel::IsProfitableToFold(SDValue N, SDNode *U,
+                                          SDNode *Root) const {
+  if (OptLevel == CodeGenOpt::None)
+    return false;
+
+  if (U == Root) {
+    switch (U->getOpcode()) {
+    default:
+      return true;
+    case M68kISD::SUB:
+    case ISD::SUB: {
+      SDNode *Dividend = U->getOperand(0).getNode();
+      if (ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(Dividend))
+        if (const uint64_t *RawData = CSDN->getAPIntValue().getRawData())
+          if (0 == *RawData)
+            return false;
+    }
+    }
+  }
+
+  return true;
+}
+
 bool M68kDAGToDAGISel::runOnMachineFunction(MachineFunction &MF) {
   Subtarget = &static_cast<const M68kSubtarget &>(MF.getSubtarget());
   return SelectionDAGISel::runOnMachineFunction(MF);


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