[PATCH] D116375: [X86] Use bit test instructions to optimize some logic atomic operations

[Phoebe Wang via Phabricator via llvm-commits]

pengfei updated this revision to Diff 398392.
pengfei added a comment.

Break AND + CMP 0 fold for atomic RMW logic instructions. This fixes the problem in Craig's example. Thanks Craig!


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D116375/new/

https://reviews.llvm.org/D116375

Files:
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/lib/Target/X86/X86ISelLowering.h
  llvm/lib/Target/X86/X86InstrCompiler.td
  llvm/lib/Target/X86/X86InstrInfo.td
  llvm/test/CodeGen/X86/atomic-bit-test.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D116375.398392.patch
Type: text/x-patch
Size: 24796 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220109/45be004b/attachment.bin>