[llvm] 3b7b1a7 - [LV] Improve check lines in existing tests.
Florian Hahn via llvm-commits
llvm-commits at lists.llvm.org
Sat Jan 8 12:46:47 PST 2022
Author: Florian Hahn
Date: 2022-01-08T20:46:31Z
New Revision: 3b7b1a75b0c1d69501b3ee31a8edcaca627d2346
URL: https://github.com/llvm/llvm-project/commit/3b7b1a75b0c1d69501b3ee31a8edcaca627d2346
DIFF: https://github.com/llvm/llvm-project/commit/3b7b1a75b0c1d69501b3ee31a8edcaca627d2346.diff
LOG: [LV] Improve check lines in existing tests.
Update the check lines in 2 existing tests to use patterns + variables
to match some IR to make them independent of value naming.
Added:
Modified:
llvm/test/Transforms/LoopVectorize/gcc-examples.ll
llvm/test/Transforms/LoopVectorize/induction_plus.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/LoopVectorize/gcc-examples.ll b/llvm/test/Transforms/LoopVectorize/gcc-examples.ll
index 4bf3787dcb407..9177609bd2607 100644
--- a/llvm/test/Transforms/LoopVectorize/gcc-examples.ll
+++ b/llvm/test/Transforms/LoopVectorize/gcc-examples.ll
@@ -367,10 +367,11 @@ define void @example11() nounwind uwtable ssp {
}
;CHECK-LABEL: @example12(
-;CHECK: %vec.ind1 = phi <4 x i32>
-;CHECK: store <4 x i32>
+;CHECK: vector.body:
+;CHECK: [[VEC_IV_TRUNC:%.+]] = phi <4 x i32>
+;CHECK: store <4 x i32> [[VEC_IV_TRUNC]]
;CHECK: ret void
-define void @example12() nounwind uwtable ssp {
+define void @example12() {
br label %1
; <label>:1 ; preds = %1, %0
diff --git a/llvm/test/Transforms/LoopVectorize/induction_plus.ll b/llvm/test/Transforms/LoopVectorize/induction_plus.ll
index 5b56446bf571f..b27b93d30bcab 100644
--- a/llvm/test/Transforms/LoopVectorize/induction_plus.ll
+++ b/llvm/test/Transforms/LoopVectorize/induction_plus.ll
@@ -4,31 +4,35 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
@array = common global [1024 x i32] zeroinitializer, align 16
-;CHECK-LABEL: @array_at_plus_one(
-;CHECK: %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
-;CHECK: [[VEC_IV_1:%.+]] = phi <4 x i64> [ <i64 0, i64 1, i64 2, i64 3>, %vector.ph ], [ [[VEC_IV_1_NEXT:%.+]], %vector.body ]
-;CHECK: [[VEC_IV_2:%.+]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %vector.ph ], [ [[VEC_IV_2_NEXT:%.+]], %vector.body ]
-;CHECK: %[[T1:.+]] = add i64 %index, 0
-;CHECK: %[[T2:.+]] = add nsw i64 %[[T1]], 12
-;CHECK: getelementptr inbounds [1024 x i32], [1024 x i32]* @array, i64 0, i64 %[[T2]]
-;CHECK: [[VEC_IV_1_NEXT]] = add <4 x i64> [[VEC_IV_1]], <i64 4, i64 4, i64 4, i64 4>
-;CHECK: [[VEC_IV_2_NEXT]] = add <4 x i32> [[VEC_IV_2]], <i32 4, i32 4, i32 4, i32 4>
-;CHECK: ret i32
-define i32 @array_at_plus_one(i32 %n) nounwind uwtable ssp {
- %1 = icmp sgt i32 %n, 0
- br i1 %1, label %.lr.ph, label %._crit_edge
+define void @array_at_plus_one(i32 %n) {
+; CHECK-LABEL: @array_at_plus_one(
+; CHECK: %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
+; CHECK-NEXT: [[VEC_IV_1:%.+]] = phi <4 x i64> [ <i64 0, i64 1, i64 2, i64 3>, %vector.ph ], [ [[VEC_IV_1_NEXT:%.+]], %vector.body ]
+; CHECK-NEXT: [[VEC_IV_TRUNC:%.+]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %vector.ph ], [ [[VEC_IV_TRUNC_NEXT:%.+]], %vector.body ]
+; CHECK: [[T1:%.+]] = add i64 %index, 0
+; CHECK: [[T2:%.+]] = add nsw i64 [[T1]], 12
+; CHECK-NEXT: [[GEP:%.+]] = getelementptr inbounds [1024 x i32], [1024 x i32]* @array, i64 0, i64 [[T2]]
+; CHECK-NEXT: [[GEP0:%.+]] = getelementptr inbounds i32, i32* [[GEP]], i32 0
+; CHECK-NEXT: [[BC:%.+]] = bitcast i32* [[GEP0]] to <4 x i32>*
+; CHECK-NEXT: store <4 x i32> [[VEC_IV_TRUNC]], <4 x i32>* [[BC]]
+; CHECK: [[VEC_IV_1_NEXT]] = add <4 x i64> [[VEC_IV_1]], <i64 4, i64 4, i64 4, i64 4>
+; CHECK: [[VEC_IV_TRUNC_NEXT]] = add <4 x i32> [[VEC_IV_TRUNC]], <i32 4, i32 4, i32 4, i32 4>
+; CHECK: ret void
+;
+entry:
+ br label %loop
-.lr.ph: ; preds = %0, %.lr.ph
- %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %0 ]
- %2 = add nsw i64 %indvars.iv, 12
- %3 = getelementptr inbounds [1024 x i32], [1024 x i32]* @array, i64 0, i64 %2
- %4 = trunc i64 %indvars.iv to i32
- store i32 %4, i32* %3, align 4
- %indvars.iv.next = add i64 %indvars.iv, 1
- %lftr.wideiv = trunc i64 %indvars.iv.next to i32
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
+ %iv.plus.12 = add nsw i64 %iv, 12
+ %gep = getelementptr inbounds [1024 x i32], [1024 x i32]* @array, i64 0, i64 %iv.plus.12
+ %iv.trunc = trunc i64 %iv to i32
+ store i32 %iv.trunc, i32* %gep, align 4
+ %iv.next = add i64 %iv, 1
+ %lftr.wideiv = trunc i64 %iv.next to i32
%exitcond = icmp eq i32 %lftr.wideiv, %n
- br i1 %exitcond, label %._crit_edge, label %.lr.ph
+ br i1 %exitcond, label %exit, label %loop
-._crit_edge: ; preds = %.lr.ph, %0
- ret i32 undef
+exit:
+ ret void
}
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