[llvm] ec2945d - [Hexagon] Reconize M2_mnaci in HexagonBitTracker

[Krzysztof Parzyszek via llvm-commits]

Author: Sumanth Gundapaneni
Date: 2022-01-07T14:48:29-08:00
New Revision: ec2945d031b6648e43630e720f38cfb3cf7ff715

URL: https://github.com/llvm/llvm-project/commit/ec2945d031b6648e43630e720f38cfb3cf7ff715
DIFF: https://github.com/llvm/llvm-project/commit/ec2945d031b6648e43630e720f38cfb3cf7ff715.diff

LOG: [Hexagon] Reconize M2_mnaci in HexagonBitTracker

Added: 
    

Modified: 
    llvm/lib/Target/Hexagon/HexagonBitTracker.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/Hexagon/HexagonBitTracker.cpp b/llvm/lib/Target/Hexagon/HexagonBitTracker.cpp
index 1938a5c259da9..8e014b395286b 100644
--- a/llvm/lib/Target/Hexagon/HexagonBitTracker.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonBitTracker.cpp
@@ -493,6 +493,11 @@ bool HexagonEvaluator::evaluate(const MachineInstr &MI,
       RegisterCell RC = eADD(rc(1), lo(M, W0));
       return rr0(RC, Outputs);
     }
+    case M2_mnaci: {
+      RegisterCell M = eMLS(rc(2), rc(3));
+      RegisterCell RC = eSUB(rc(1), lo(M, W0));
+      return rr0(RC, Outputs);
+    }
     case M2_mpysmi: {
       RegisterCell M = eMLS(rc(1), eIMM(im(2), W0));
       return rr0(lo(M, 32), Outputs);