[PATCH] D116743: [PowerPC] Add assembly comments for instructions that use the vector registers.
Amy Kwan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 7 06:59:05 PST 2022
amyk added a comment.
nit: The description has `regsiter` a number of times, please update it to `register`
This a ver useful patch. Thanks Stefan! I have a question (might be silly but...), if verbose asm is enabled by default, does it require an update to more than the two test cases that you've updated in this patch?
(I guess what I am getting at here is if verbose asm is enabled by default, I would have expected a whole bunch of other tests to also require updating, but I may be misunderstanding here.)
================
Comment at: llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstComments.cpp:22
+
+// hasVectorRegs return a pair of booleans if MI uses or defines any regiers
+// that overlap with the vector registers.
----------------
================
Comment at: llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstComments.cpp:124
+
+ // If the intruction has no vector regsiters we don't really care.
+ if (!HasVecUseOrDef.first && !HasVecUseOrDef.second)
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Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D116743/new/
https://reviews.llvm.org/D116743
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