[PATCH] D116584: [RISCV] Block vmsgeu.vi with 0 immediate in Isel

Chenbing.Zheng via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 6 22:35:31 PST 2022


Chenbing.Zheng marked 2 inline comments as done.
Chenbing.Zheng added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:830
+        if (CVal >= -15 && CVal <= 16) {
+          if (IsUnsigned && CVal == 0)
+            IsCmpUnsignedZero = true;
----------------
craig.topper wrote:
> ```
> if (!IsUnsigned || CVal != 0)
>   break;
> IsCmpUnsignedZero = true;
> ```
done


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D116584/new/

https://reviews.llvm.org/D116584



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