[PATCH] D115861: [LoongArch 4/6] Add basic tablegen infra for LoongArch

[Fangrui Song via Phabricator via llvm-commits]

MaskRay added inline comments.


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Comment at: llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp:44
+                                       const MCSubtargetInfo *STI) const {
+  // Check for a less than instruction size number of bytes
+  if ((Count % 4) != 0)
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xen0n wrote:
> Cannot figure this out even as Chinglish... Maybe you meant something like "Check for byte count not multiple of instruction word size"?
And avoid unneeded parens: `if (Count % 4 != 0)`


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Comment at: llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCAsmInfo.cpp:24
+  CodePointerSize = CalleeSaveStackSlotSize = TT.isArch64Bit() ? 8 : 4;
+  // clang-format off
+  AlignmentIsInBytes          = false;
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It's unnecessary to align `=`. Just remove alignment and `// clang-format`


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D115861/new/

https://reviews.llvm.org/D115861