[PATCH] D116039: [X86] Combine reduce (add (mul x, y)) to VNNI instruction.

[Craig Topper via Phabricator via llvm-commits]

craig.topper accepted this revision.
craig.topper added a comment.
This revision is now accepted and ready to land.

LGTM other than that one comment.



================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:41862
+      MVT::getVectorVT(MVT::i8, LHS.getValueType().getVectorElementCount());
+  if (LHS.getValueType().getScalarType() != MVT::i8)
+    LHS = DAG.getZExtOrTrunc(LHS, DL, Vi8VT);
----------------
You can drop these ifs. getZExtOrTrunc/getSExtOrTrunc will do nothing if the type already matches.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D116039/new/

https://reviews.llvm.org/D116039