[PATCH] D116756: [AVR] Do not clear r0 at interrupt entry

[Ayke via Phabricator via llvm-commits]

aykevl created this revision.
aykevl added reviewers: benshi001, dylanmckay.
Herald added subscribers: Jim, hiraditya.
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There is no reason to do this: it's a scratch register and can therefore
hold any arbitrary value. And because it is in an interrupt, this code
is performance critical so it should be as short as possible.

I believe r0 was cleared because of the following:

1. There used to be a bug that the cleared register was r0, not r1 as it should have been.
2. This was fixed in https://reviews.llvm.org/D99467, but left the code to clear r0.

This patch completes D99467 <https://reviews.llvm.org/D99467> by removing the `clr r0` instruction.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D116756

Files:
  llvm/lib/Target/AVR/AVRFrameLowering.cpp
  llvm/test/CodeGen/AVR/interrupts.ll


Index: llvm/test/CodeGen/AVR/interrupts.ll
===================================================================
--- llvm/test/CodeGen/AVR/interrupts.ll
+++ llvm/test/CodeGen/AVR/interrupts.ll
@@ -9,7 +9,6 @@
 ; CHECK-NEXT: push r1
 ; CHECK-NEXT: in r0, 63
 ; CHECK-NEXT: push r0
-; CHECK: clr r0
 ; CHECK-NEXT: clr r1
 ; CHECK: pop r0
 ; CHECK-NEXT: out 63, r0
@@ -26,7 +25,6 @@
 ; CHECK-NEXT: push r1
 ; CHECK-NEXT: in r0, 63
 ; CHECK-NEXT: push r0
-; CHECK: clr r0
 ; CHECK-NEXT: clr r1
 ; CHECK: pop r0
 ; CHECK-NEXT: out 63, r0
@@ -43,7 +41,6 @@
 ; CHECK-NEXT: push r1
 ; CHECK-NEXT: in r0, 63
 ; CHECK-NEXT: push r0
-; CHECK: clr r0
 ; CHECK-NEXT: clr r1
 ; CHECK: pop r0
 ; CHECK-NEXT: out 63, r0
@@ -60,7 +57,6 @@
 ; CHECK-NEXT: push r1
 ; CHECK-NEXT: in r0, 63
 ; CHECK-NEXT: push r0
-; CHECK: clr r0
 ; CHECK-NEXT: clr r1
 ; CHECK: pop r0
 ; CHECK-NEXT: out 63, r0
@@ -77,7 +73,6 @@
 ; CHECK-NEXT: push r1
 ; CHECK-NEXT: in r0, 63
 ; CHECK-NEXT: push r0
-; CHECK: clr r0
 ; CHECK-NEXT: clr r1
 ; CHECK: push r28
 ; CHECK-NEXT: push r29
@@ -112,7 +107,6 @@
 ; CHECK-NEXT: push r1
 ; CHECK-NEXT: in r0, 63
 ; CHECK-NEXT: push r0
-; CHECK-NEXT: clr r0
 ; CHECK-NEXT: clr r1
 ; CHECK-NEXT: push r24
 ; CHECK-NEXT: lds r24, count
@@ -140,7 +134,6 @@
 ; CHECK-NEXT: push r1
 ; CHECK-NEXT: in r0, 63
 ; CHECK-NEXT: push r0
-; CHECK-NEXT: clr r0
 ; CHECK-NEXT: clr r1
 ; CHECK-NEXT: push r18
 ; CHECK-NEXT: push r19
Index: llvm/lib/Target/AVR/AVRFrameLowering.cpp
===================================================================
--- llvm/lib/Target/AVR/AVRFrameLowering.cpp
+++ llvm/lib/Target/AVR/AVRFrameLowering.cpp
@@ -78,11 +78,6 @@
     BuildMI(MBB, MBBI, DL, TII.get(AVR::PUSHRr))
         .addReg(AVR::R0, RegState::Kill)
         .setMIFlag(MachineInstr::FrameSetup);
-    BuildMI(MBB, MBBI, DL, TII.get(AVR::EORRdRr))
-        .addReg(AVR::R0, RegState::Define)
-        .addReg(AVR::R0, RegState::Kill)
-        .addReg(AVR::R0, RegState::Kill)
-        .setMIFlag(MachineInstr::FrameSetup);
     BuildMI(MBB, MBBI, DL, TII.get(AVR::EORRdRr))
         .addReg(AVR::R1, RegState::Define)
         .addReg(AVR::R1, RegState::Kill)


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