[PATCH] D116397: [RISCV] Add an MIR pass to replace redundant sext.w instructions with copies.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 6 08:24:04 PST 2022


This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG56ca11e31e6a: [RISCV] Add an MIR pass to replace redundant sext.w instructions with copies. (authored by craig.topper).

Changed prior to commit:
  https://reviews.llvm.org/D116397?vs=397001&id=397904#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D116397/new/

https://reviews.llvm.org/D116397

Files:
  llvm/lib/Target/RISCV/CMakeLists.txt
  llvm/lib/Target/RISCV/RISCV.h
  llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp
  llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
  llvm/test/CodeGen/RISCV/atomic-rmw.ll
  llvm/test/CodeGen/RISCV/atomic-signext.ll
  llvm/test/CodeGen/RISCV/rv64zbs.ll
  llvm/test/CodeGen/RISCV/sextw-removal.ll
  llvm/test/CodeGen/RISCV/split-offsets.ll

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