[PATCH] D116720: [RISCV] Use shift for zext.h when Zbb and Zbp are not enabled

[Haocong Lu via Phabricator via llvm-commits]

Luhaocong added a comment.

In D116720#3224271 <https://reviews.llvm.org/D116720#3224271>, @craig.topper wrote:

> The AND could be better for loops if LICM can move the constant materialization out of the loop.
>
> I’ve wondered about doing this as a machine IR peephole after LICM has its chance. But I haven’t spent any time on it.

Would it be better as follow？

1. Always Select SLLI + SRLI when input is all ones value exceeding simm12.
2. in PeepholeOptimzer or other pass，revert SLLI + SRLI to LUI + ADDI + AND if they are in loop.


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