[PATCH] D116468: [AArch64] Combine ADD/SUB instructions when they contain a 24-bit immediate.
Ben Shi via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 6 00:39:31 PST 2022
benshi001 added a comment.
In D116468#3217217 <https://reviews.llvm.org/D116468#3217217>, @dmgreen wrote:
> Oh interesting. This is similar to D111034 <https://reviews.llvm.org/D111034>, but that was reverted again. I'm not sure why, apparently MIPeephole optimizations are all too easy to get wrong.
>
> The problem with doing this is when it is done in a loop. Something like this example: https://godbolt.org/z/e5f4hWGcq, where preferably the loop invariant mov can be hoisted out of the loop, leaving a single add. Can we make sure there is a test case for that example, and try and guard against it?
>
> Also, I think a ADD+MOVi16 might be slightly better than a ADD+ADD. (As in - the MOV is a 16bit imm that can be materialized with a single instruction). The two ADDs might make a longer critical path. It's if the MOV pseudo would need multiple instructions that the add becomes beneficial.
I am quite sorry for that. Though `make check-all` passed and everything is good on amd64, the clang built into aarch64 ELF and run on aarch64-linux crashed. And I have no aarch64 host machine to debug that (although I guess it should be a minor bug).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D116468/new/
https://reviews.llvm.org/D116468
More information about the llvm-commits
mailing list