[PATCH] D116723: [RISCV] Use simm5_plus1_nonzero in isel patterns for vmsgeu.vi/vmsltu.vi intrinsics.

Chenbing.Zheng via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 5 23:37:05 PST 2022

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Chenbing.Zheng accepted this revision.
Chenbing.Zheng added a comment.
This revision is now accepted and ready to land.

LGTM


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D116723/new/

https://reviews.llvm.org/D116723

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