[PATCH] D116584: [RISCV] Block vmsltu.vx/vmsgeu.vi with 0 immediate in Isel

[Chenbing.Zheng via Phabricator via llvm-commits]

Chenbing.Zheng added a comment.

In D116584#3224373 <https://reviews.llvm.org/D116584#3224373>, @craig.topper wrote:

> I posted an alternative version that handles vsltu.vi without RISCVISelDAGToDAG.cpp changes here https://reviews.llvm.org/D116723

I read your patch, it is a good solution. I will rebase after for your patch merge into the main



================
Comment at: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:817
       break;
+    case Intrinsic::riscv_vmsltu: {
+      SDValue Src1 = Node->getOperand(1);
----------------
Chenbing.Zheng wrote:
> craig.topper wrote:
> > Chenbing.Zheng wrote:
> > > craig.topper wrote:
> > > > This could be done by using a new version of simm5_plus1 that excludes 0 in VPatCompare_VI for the vmsltu case.
> > > New simm5_plus1 excludes 0, and  I Keep pattern  "defm : VPatCompareUnsignedZero<"int_riscv_vmsltu", "PseudoVMSNE">" to match vmsltu 0，and del this two case.  Understanding right ?
> > Remove the VPatCOmpareUnisignedZero. The vmsltu.vx will then be able to match. The 0 will select to X0.
> I try it, but  vmsleu.vi -1 still generate. 
> VPattern of vmsltu.vx is different from vmsltu.vi , it cause vmsltu.vx canot be match ?
> So I keep these two cases, and delate VPatCompareUnsignedZero in my newest patch.
> This could be done by using a new version of simm5_plus1 that excludes 0 in VPatCompare_VI for the vmsltu case.

simm5_plus1  newest code in branch main. I thought is it define range -15 ~ 16 ?  havn't excludes 0?  or  there are some new patch havn't push to main?

def simm5_plus1 : Operand<XLenVT>, ImmLeaf<XLenVT,
  [{return (isInt<5>(Imm) && Imm != -16) || Imm == 16;}]> {
  let ParserMatchClass = SImm5Plus1AsmOperand;
  let MCOperandPredicate = [{
    int64_t Imm;
    if (MCOp.evaluateAsConstantImm(Imm))
      return (isInt<5>(Imm) && Imm != -16) || Imm == 16;
    return MCOp.isBareSymbolRef();
  }];
}


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D116584/new/

https://reviews.llvm.org/D116584