[PATCH] D116664: [AArch64] Improve codegen for get.active.lane.mask when SVE is available

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

I'm not sure the testcases actually illustrate the cases we care about.  Generally, I would expect the result of llvm.get.active.lane.mask() to be used in a select instruction, or a masked load, or something like that.  And in that case, I'm not sure the way you're choosing the VT is appropriate; the instruction using the mask is probably not going to expect a 64-bit vector.


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https://reviews.llvm.org/D116664