[PATCH] D116157: [AArch64] Adding "armv8.8-a" memcpy/memset support.
Simon Tatham via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 5 02:21:01 PST 2022
simon_tatham added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64InstrFormats.td:11455
+ let DecoderMethod = "DecodeCPYMemOpInstruction";
+ let hasNoSchedulingInfo = 1;
+}
----------------
tmatheson wrote:
> dmgreen wrote:
> > Should this be hasNoSchedulingInfo? Can we remove this or include something very basic?
> >
> > Should something here be marking them MayLoad and MayStore? They may already be hasSideEffects, as nothing marks them otherwise and they do not have codegen patterns, which is more strict. But it's probably good to be explicit.
> > Should this be hasNoSchedulingInfo? Can we remove this or include something very basic?
>
> I'm not sure why this is set, @simon_tatham might remember. My guess would be that the alternative is adding Sched<[]> but that doesn't seem to work on the multiclass - CodeGenSchedModels::checkCompleteness() does not recognise the final defs as having the Sched subclass.
No, sorry – I think when I wrote the internal version of this patch I just did whatever would most quickly get Tablegen to stop complaining about incomplete scheduling models. If @dmgreen thinks it's wrong, I'd trust him over me :-)
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https://reviews.llvm.org/D116157/new/
https://reviews.llvm.org/D116157
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