[PATCH] D116042: [AMDGPU][InstCombine] Remove zero LOD bias

Sebastian Neubauer via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 5 01:57:23 PST 2022


sebastian-ne added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp:143
+                                                     ImageDimIntr->Dim);
+        return modifyIntrinsicCall(
+            II, NewImageDimIntr->Intr, IC, [&](auto &Args, auto &ArgTys) {
----------------
foad wrote:
> Is it possible that more than one of these optimizations applies to a single intrinsic call, and if so do you handle that case correctly? (E.g. when you apply one optimization, does simplifyAMDGCNImageIntrinsic get called again to apply other optimizations to the new intrinsic?)
Yes, it gets called again. (E.g. the combines for `Intrinsic::amdgcn_fma_legacy` also return early when one of them matches.)
The `@sample_b_1d_a16` test also checks that the no-bias and a16 combine is applied.


================
Comment at: llvm/test/CodeGen/AMDGPU/image_ls_mipmap_zero.ll:132
-attributes #1 = { nounwind readonly }
-
----------------
arsenm wrote:
> I don't know about deleting codegen tests for this, these still show the behavior in this scenario
I deleted them because they started failing for me. I guess the codegen tests don’t run the combines? (Anyway, this moved to D116116)


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D116042/new/

https://reviews.llvm.org/D116042



More information about the llvm-commits mailing list