[llvm] 60944d1 - [Hexagon] Convert codegen testcase from .ll to .mir

[Krzysztof Parzyszek via llvm-commits]

Author: Krzysztof Parzyszek
Date: 2022-01-04T15:41:32-08:00
New Revision: 60944d132fe35b774017b7ad05edb55642509642

URL: https://github.com/llvm/llvm-project/commit/60944d132fe35b774017b7ad05edb55642509642
DIFF: https://github.com/llvm/llvm-project/commit/60944d132fe35b774017b7ad05edb55642509642.diff

LOG: [Hexagon] Convert codegen testcase from .ll to .mir

Added: 
    llvm/test/CodeGen/Hexagon/copy-to-combine-const64.mir

Modified: 
    llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp
    llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp

Removed: 
    llvm/test/CodeGen/Hexagon/const64.ll


################################################################################
diff  --git a/llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp b/llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp
index 03b0f75b2dc1c..2ee7f1325df90 100644
--- a/llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp
@@ -70,9 +70,7 @@ class HexagonCopyToCombine : public MachineFunctionPass  {
 public:
   static char ID;
 
-  HexagonCopyToCombine() : MachineFunctionPass(ID) {
-    initializeHexagonCopyToCombinePass(*PassRegistry::getPassRegistry());
-  }
+  HexagonCopyToCombine() : MachineFunctionPass(ID) {}
 
   void getAnalysisUsage(AnalysisUsage &AU) const override {
     MachineFunctionPass::getAnalysisUsage(AU);

diff  --git a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
index fcf829b522ccd..c6703bb8a62a5 100644
--- a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
@@ -139,6 +139,7 @@ namespace llvm {
   void initializeHexagonBitSimplifyPass(PassRegistry&);
   void initializeHexagonConstExtendersPass(PassRegistry&);
   void initializeHexagonConstPropagationPass(PassRegistry&);
+  void initializeHexagonCopyToCombinePass(PassRegistry&);
   void initializeHexagonEarlyIfConversionPass(PassRegistry&);
   void initializeHexagonExpandCondsetsPass(PassRegistry&);
   void initializeHexagonGenMuxPass(PassRegistry&);
@@ -199,6 +200,7 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeHexagonTarget() {
   initializeHexagonBitSimplifyPass(PR);
   initializeHexagonConstExtendersPass(PR);
   initializeHexagonConstPropagationPass(PR);
+  initializeHexagonCopyToCombinePass(PR);
   initializeHexagonEarlyIfConversionPass(PR);
   initializeHexagonGenMuxPass(PR);
   initializeHexagonHardwareLoopsPass(PR);

diff  --git a/llvm/test/CodeGen/Hexagon/const64.ll b/llvm/test/CodeGen/Hexagon/const64.ll
deleted file mode 100644
index 018157d97024e..0000000000000
--- a/llvm/test/CodeGen/Hexagon/const64.ll
+++ /dev/null
@@ -1,18 +0,0 @@
-; RUN: llc -march=hexagon -disable-const64=0 < %s | FileCheck %s
-; RUN: llc -march=hexagon -disable-const64=1 < %s | FileCheck %s --check-prefix=CHECKOLD
-
-; CHECK: CONST64
-; CHECKOLD-NOT: CONST64
-
-target datalayout = "e-m:e-p:32:32-i1:32-i64:64-a:0-v32:32-n16:32"
-target triple = "hexagon"
-
-; Function Attrs: nounwind
-define void @foo() optsize {
-entry:
-  call void @bar(i32 32768, i32 32768, i8 zeroext 1)
-  ret void
-}
-
-declare void @bar(i32, i32, i8 zeroext)
-

diff  --git a/llvm/test/CodeGen/Hexagon/copy-to-combine-const64.mir b/llvm/test/CodeGen/Hexagon/copy-to-combine-const64.mir
new file mode 100644
index 0000000000000..d20d7692e861f
--- /dev/null
+++ b/llvm/test/CodeGen/Hexagon/copy-to-combine-const64.mir
@@ -0,0 +1,29 @@
+# RUN: llc -march=hexagon -run-pass hexagon-copy-combine -o - %s -disable-const64=0 | FileCheck --check-prefix CHECK64 %s
+# RUN: llc -march=hexagon -run-pass hexagon-copy-combine -o - %s -disable-const64=1 | FileCheck --check-prefix CHECKNO64 %s
+
+# CHECK64: CONST64
+# CHECKNO64-NOT: CONST64
+
+--- |
+  define void @f0() optsize {
+  entry:
+    call void @f1(i32 32768, i32 32768, i8 zeroext 1)
+    ret void
+  }
+
+  declare void @f1(i32, i32, i8 zeroext)
+...
+
+name: f0
+tracksRegLiveness: true
+stack:
+  - { id: 0, offset: 0, size: 4, alignment: 8 }
+body: |
+  bb.0:
+    $r29 = S2_allocframe $r29, 0, implicit-def $r30, implicit $framekey, implicit $framelimit, implicit $r30, implicit $r31 :: (store (s32) into stack)
+    $r0 = A2_tfrsi 32768
+    $r1 = A2_tfrsi 32768
+    $r2 = A2_tfrsi 1
+    J2_call @f1, hexagoncsr, implicit-def dead $pc, implicit-def dead $r31, implicit $r29, implicit killed $r0, implicit killed $r1, implicit killed $r2, implicit-def $r29
+    $d15 = L4_return $r30, implicit-def $pc, implicit-def $r29, implicit $framekey, implicit-def dead $pc
+...