[PATCH] D116424: [PowerPC] add LR to CalleeSavedRegs
Nick Desaulniers via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 4 14:04:17 PST 2022
nickdesaulniers added inline comments.
================
Comment at: llvm/lib/Target/PowerPC/PPCCallingConv.td:301
F19, F20, F21, F22, F23, F24, F25, F26,
- F27, F28, F29, F30, F31, CR2, CR3, CR4
+ F27, F28, F29, F30, F31, CR2, CR3, CR4, LR8
)>;
----------------
I'm guessing we probably also want to add `LR` to the 32b CSR list?
================
Comment at: llvm/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll:7
+; RUN: llc -mtriple=powerpc64-ibm-aix-xcoff -mattr=-altivec -mcpu=pwr8 %s -o - -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
+; RUN: llc -mtriple=powerpc64-ibm-aix-xcoff %s -o - -enable-shrink-wrap=false -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
;
----------------
using `update_llc_test_checks.py` totally massacred this test. I'm happy to update it by hand, if the reviewers agree with the approach of this patch otherwise.
================
Comment at: llvm/test/CodeGen/PowerPC/ppc64-inlineasm-clobber.ll:75
;; Test for INLINEASM_BR
define dso_local signext i32 @ClobberLR_BR(i32 signext %in) #0 {
; PPC64LE-LABEL: ClobberLR_BR:
----------------
Note to reviewers; this test case is the one I'm trying to fix here.
================
Comment at: llvm/test/CodeGen/PowerPC/xray-conditional-return.ll:1
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -filetype=asm -o - -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
----------------
I'm happy to pre-commit this conversion if reviewers are generally ok with this approach.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D116424/new/
https://reviews.llvm.org/D116424
More information about the llvm-commits
mailing list