[llvm] cff1a2e - [Hexagon] HVX .new store uses different resources

Krzysztof Parzyszek via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 4 13:43:00 PST 2022


Author: SANTANU DAS
Date: 2022-01-04T13:35:34-08:00
New Revision: cff1a2ed5159bc16e36c1515518239e18d05f2ff

URL: https://github.com/llvm/llvm-project/commit/cff1a2ed5159bc16e36c1515518239e18d05f2ff
DIFF: https://github.com/llvm/llvm-project/commit/cff1a2ed5159bc16e36c1515518239e18d05f2ff.diff

LOG: [Hexagon] HVX .new store uses different resources

When checking resources in the post RA scheduler, see if a .new
vector store should be used instead of a regular vector store.

It may not be possible to schedule a regular vector store, but
it may be possible to schedule a .new version. If the correct one
isn't used, then the post RA scheduler may not generate the best
schedule.

Added: 
    

Modified: 
    llvm/lib/Target/Hexagon/HexagonHazardRecognizer.cpp
    llvm/lib/Target/Hexagon/HexagonHazardRecognizer.h

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/Hexagon/HexagonHazardRecognizer.cpp b/llvm/lib/Target/Hexagon/HexagonHazardRecognizer.cpp
index 44679d429de5..e2215c9900d0 100644
--- a/llvm/lib/Target/Hexagon/HexagonHazardRecognizer.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonHazardRecognizer.cpp
@@ -44,12 +44,7 @@ HexagonHazardRecognizer::getHazardType(SUnit *SU, int stalls) {
   if (!Resources->canReserveResources(*MI)) {
     LLVM_DEBUG(dbgs() << "*** Hazard in cycle " << PacketNum << ", " << *MI);
     HazardType RetVal = Hazard;
-    if (TII->mayBeNewStore(*MI)) {
-      // Make sure the register to be stored is defined by an instruction in the
-      // packet.
-      MachineOperand &MO = MI->getOperand(MI->getNumOperands() - 1);
-      if (!MO.isReg() || RegDefs.count(MO.getReg()) == 0)
-        return Hazard;
+    if (isNewStore(*MI)) {
       // The .new store version uses 
diff erent resources so check if it
       // causes a hazard.
       MachineFunction *MF = MI->getParent()->getParent();
@@ -105,6 +100,15 @@ bool HexagonHazardRecognizer::ShouldPreferAnother(SUnit *SU) {
   return UsesDotCur && ((SU == UsesDotCur) ^ (DotCurPNum == (int)PacketNum));
 }
 
+/// Return true if the instruction would be converted to a new value store when
+/// packetized.
+bool HexagonHazardRecognizer::isNewStore(MachineInstr &MI) {
+  if (!TII->mayBeNewStore(MI))
+    return false;
+  MachineOperand &MO = MI.getOperand(MI.getNumOperands() - 1);
+  return (MO.isReg() && RegDefs.count(MO.getReg()) != 0);
+}
+
 void HexagonHazardRecognizer::EmitInstruction(SUnit *SU) {
   MachineInstr *MI = SU->getInstr();
   if (!MI)
@@ -119,7 +123,7 @@ void HexagonHazardRecognizer::EmitInstruction(SUnit *SU) {
   if (TII->isZeroCost(MI->getOpcode()))
     return;
 
-  if (!Resources->canReserveResources(*MI)) {
+  if (!Resources->canReserveResources(*MI) || isNewStore(*MI)) {
     // It must be a .new store since other instructions must be able to be
     // reserved at this point.
     assert(TII->mayBeNewStore(*MI) && "Expecting .new store");
@@ -127,11 +131,12 @@ void HexagonHazardRecognizer::EmitInstruction(SUnit *SU) {
     MachineInstr *NewMI =
         MF->CreateMachineInstr(TII->get(TII->getDotNewOp(*MI)),
                                MI->getDebugLoc());
-    assert(Resources->canReserveResources(*NewMI));
-    Resources->reserveResources(*NewMI);
+    if (Resources->canReserveResources(*NewMI))
+      Resources->reserveResources(*NewMI);
+    else
+      Resources->reserveResources(*MI);
     MF->deleteMachineInstr(NewMI);
-  }
-  else
+  } else
     Resources->reserveResources(*MI);
   LLVM_DEBUG(dbgs() << " Add instruction " << *MI);
 

diff  --git a/llvm/lib/Target/Hexagon/HexagonHazardRecognizer.h b/llvm/lib/Target/Hexagon/HexagonHazardRecognizer.h
index 53b9cb43b4b6..0528cbd1f15f 100644
--- a/llvm/lib/Target/Hexagon/HexagonHazardRecognizer.h
+++ b/llvm/lib/Target/Hexagon/HexagonHazardRecognizer.h
@@ -40,6 +40,10 @@ class HexagonHazardRecognizer : public ScheduleHazardRecognizer {
   // The set of registers defined by instructions in the current packet.
   SmallSet<unsigned, 8> RegDefs;
 
+  // Return true if the instruction is a store that is converted to a new value
+  // store because its value is defined in the same packet.
+  bool isNewStore(MachineInstr &MI);
+
 public:
   HexagonHazardRecognizer(const InstrItineraryData *II,
                           const HexagonInstrInfo *HII,


        


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