[PATCH] D116273: [AMDGPU] Iterate LoweredEndCf in the reverse order
    Stanislav Mekhanoshin via Phabricator via llvm-commits 
    llvm-commits at lists.llvm.org
       
    Tue Jan  4 09:26:10 PST 2022
    
    
  
rampitec added inline comments.
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Comment at: llvm/test/CodeGen/AMDGPU/collapse-endcf.mir:704
+# While collapsing inner endcf, certain blocks ended up getting two S_BRANCH instructions.
+# It happens in the absence of BranchFolding (mostly at -O0) when the irregularly placed BBs are traversed
+# in the forward direction and the intervening block between a predecessor and its successor gets optimized
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It seems you need test running at -O0 to cover it.
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Comment at: llvm/test/CodeGen/AMDGPU/collapse-endcf.mir:715
+  ; GCN-LABEL: name: no_multiple_unconditional_branches
+  ; GCN: bb.0:
+  ; GCN:   successors: %bb.1(0x40000000), %bb.14(0x40000000)
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Wasn't update_mir_test_checks.py changed to use -NEXT checks?
Repository:
  rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D116273/new/
https://reviews.llvm.org/D116273
    
    
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