[llvm] 4c2aba9 - [VP][ISel] use LEGALPOS for legalization action

[Simon Moll via llvm-commits]

Author: Simon Moll
Date: 2022-01-04T14:50:49+01:00
New Revision: 4c2aba999e54270871d5ff8f6c765e8b834dfe27

URL: https://github.com/llvm/llvm-project/commit/4c2aba999e54270871d5ff8f6c765e8b834dfe27
DIFF: https://github.com/llvm/llvm-project/commit/4c2aba999e54270871d5ff8f6c765e8b834dfe27.diff

LOG: [VP][ISel] use LEGALPOS for legalization action

Use the VPIntrinsics.def's LEGALPOS that is specified with every VP
SDNode to determine which return or operand value type shall be used to
infer the legalization action.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D116594

Added: 
    

Modified: 
    llvm/include/llvm/IR/VPIntrinsics.def
    llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp

Removed: 
    


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diff  --git a/llvm/include/llvm/IR/VPIntrinsics.def b/llvm/include/llvm/IR/VPIntrinsics.def
index 121c8bbc6c273..3b360d8d15066 100644
--- a/llvm/include/llvm/IR/VPIntrinsics.def
+++ b/llvm/include/llvm/IR/VPIntrinsics.def
@@ -39,9 +39,9 @@
 // same name.  Since the operands are also the same, we open the property
 // scopes for both the VPIntrinsic and the SDNode at once.
 // \p VPSD     The SelectionDAG Node id (eg VP_ADD).
-// \p LEGALPOS The operand position of the SDNode that is used for legalizing
-//             this SDNode. This can be `-1`, in which case the return type of
-//             the SDNode is used.
+// \p LEGALPOS The operand position of the SDNode that is used for legalizing.
+//             If LEGALPOS < 0, then the return type given by
+//             TheNode->getValueType(-1-LEGALPOS) is used.
 // \p TDNAME   The name of the TableGen definition of this SDNode.
 // \p MASKPOS  The mask operand position.
 // \p EVLPOS   The explicit vector length operand position.

diff  --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
index 96c5a79cf9958..cbb28863850fe 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
@@ -350,7 +350,6 @@ SDValue VectorLegalizer::LegalizeOp(SDValue Op) {
   case ISD::CTPOP:
   case ISD::SELECT:
   case ISD::VSELECT:
-  case ISD::VP_SELECT:
   case ISD::SELECT_CC:
   case ISD::ZERO_EXTEND:
   case ISD::ANY_EXTEND:
@@ -459,6 +458,14 @@ SDValue VectorLegalizer::LegalizeOp(SDValue Op) {
       Action = TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0));
     break;
   }
+
+#define BEGIN_REGISTER_VP_SDNODE(VPID, LEGALPOS, ...)                          \
+  case ISD::VPID: {                                                            \
+    EVT LegalizeVT = LEGALPOS < 0 ? Node->getValueType(-(1 + LEGALPOS))        \
+                                  : Node->getOperand(LEGALPOS).getValueType(); \
+    Action = TLI.getOperationAction(Node->getOpcode(), LegalizeVT);            \
+  } break;
+#include "llvm/IR/VPIntrinsics.def"
   }
 
   LLVM_DEBUG(dbgs() << "\nLegalizing vector op: "; Node->dump(&DAG));