[PATCH] D116529: [GlobalISel] Fold or of shifts with constant amount to funnel shift.

Jay Foad via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 4 02:16:23 PST 2022


foad added inline comments.


================
Comment at: llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp:3898
+
+    // (or (shl x, amt), (lshr y, (sub bw, amt))) -> (fshl x, y, amt)
+  } else if (mi_match(LShrAmt, MRI,
----------------
I think this comment belongs just above the `FshOpc = ` line.


================
Comment at: llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp:3904
 
-    // Match (or (shl x, sub(bw, amt)), (lshr y, amt)).
-  } else if (mi_match(Dst, MRI,
-                      m_GOr(m_GLShr(m_Reg(LShrSrc), m_Reg(LShrAmt)),
-                            m_GShl(m_Reg(ShlSrc),
-                                   m_GSub(m_SpecificICstOrSplat(BitWidth),
-                                          m_Reg(ShlAmt)))))) {
+    // (or (shl x, (sub bw, amt)), (lshr y, amt)) -> (fshr x, y, amt)
+  } else if (mi_match(ShlAmt, MRI,
----------------
Likewise.


================
Comment at: llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll:2219
+; GFX6-NEXT:    v_mov_b32_e32 v2, s4
+; GFX6-NEXT:    v_alignbit_b32 v0, s1, v0, 16
+; GFX6-NEXT:    v_alignbit_b32 v1, s3, v1, 16
----------------
Maybe not your fault, but it's a bad idea to use a VALU instruction for uniform values, especially if it means we need to insert readfirstlanes.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D116529/new/

https://reviews.llvm.org/D116529



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