[PATCH] D116479: [VPlan] Introduce and use ExitCheckAndBranch VPInstruction.

[Florian Hahn via Phabricator via llvm-commits]

fhahn updated this revision to Diff 397094.
fhahn marked 5 inline comments as done.
fhahn added a comment.

Address latest comments, thanks!

In D116479#3216491 <https://reviews.llvm.org/D116479#3216491>, @Ayal wrote:

> In D116479#3216412 <https://reviews.llvm.org/D116479#3216412>, @fhahn wrote:
>
>> Move VectorTripCount printing from D113223 <https://reviews.llvm.org/D113223> to this patch.
>>
>> In D116479#3216397 <https://reviews.llvm.org/D116479#3216397>, @Ayal wrote:
>>
>>> 
>
> Main motivation behind a BranchOnCount recipe is to capture higher semantics and a meaningful idiom in VPlan - clearly modelling the scalar IV which controls a countable loop, rather than minimizing number of opcodes or lowering to ordinary operations. How other IV's should be modelled and optimized is indeed worth addressing, aiming for clarity as well while avoiding premature optimization best left to other passes, e.g., LSR. It should also be possible to optimize BranchOnCount away into other recipes as a VPlan to VPlan transformation, if and when desired.

Sounds good. Should I rename CheckExitAndBranch -> BranchOnCount? The scalar IV should already be modeled clearly via the dedicated recipe, irrespective of where the bump happens. I left it as is for now, but folding the count in should be a trivial change.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D116479/new/

https://reviews.llvm.org/D116479

Files:
  llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
  llvm/lib/Transforms/Vectorize/VPlan.cpp
  llvm/lib/Transforms/Vectorize/VPlan.h
  llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
  llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll
  llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-predselect.ll
  llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-types.ll
  llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
  llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
  llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
  llvm/test/Transforms/LoopVectorize/first-order-recurrence-sink-replicate-region.ll
  llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
  llvm/test/Transforms/LoopVectorize/icmp-uniforms.ll
  llvm/test/Transforms/LoopVectorize/outer-loop-vec-phi-predecessor-order.ll
  llvm/test/Transforms/LoopVectorize/pr51614-fold-tail-by-masking.ll
  llvm/test/Transforms/LoopVectorize/select-reduction.ll
  llvm/test/Transforms/LoopVectorize/vplan-dot-printing.ll
  llvm/test/Transforms/LoopVectorize/vplan-printing.ll
  llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge-vf1.ll
  llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge.ll
  llvm/test/Transforms/LoopVectorize/vplan-vectorize-inner-loop-reduction.ll
  llvm/test/Transforms/LoopVectorize/vplan-widen-call-instruction.ll

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