[llvm] f6e90fa - Remove loop invariant exit conditions from tests in advance of D116496
Philip Reames via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 3 09:51:08 PST 2022
Author: Philip Reames
Date: 2022-01-03T09:44:28-08:00
New Revision: f6e90fac35553be15829a114595ab042335d914f
URL: https://github.com/llvm/llvm-project/commit/f6e90fac35553be15829a114595ab042335d914f
DIFF: https://github.com/llvm/llvm-project/commit/f6e90fac35553be15829a114595ab042335d914f.diff
LOG: Remove loop invariant exit conditions from tests in advance of D116496
Reviewer suggested this was more in spirit of the original tests.
Added:
Modified:
llvm/test/Transforms/LoopUnroll/pr31718.ll
llvm/test/Transforms/LoopUnroll/runtime-loop-multiexit-dom-verify.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/LoopUnroll/pr31718.ll b/llvm/test/Transforms/LoopUnroll/pr31718.ll
index 15dca48452486..be25809b410c6 100644
--- a/llvm/test/Transforms/LoopUnroll/pr31718.ll
+++ b/llvm/test/Transforms/LoopUnroll/pr31718.ll
@@ -6,8 +6,9 @@ target triple = "x86_64-unknown-linux-gnu"
@b = external local_unnamed_addr global i32, align 4
+declare i1 @unknown(i32) readonly nounwind willreturn
-define void @main(i1 %c) local_unnamed_addr #0 {
+define void @main() local_unnamed_addr #0 {
; CHECK-LABEL: @main(
; CHECK-NEXT: ph1:
; CHECK-NEXT: br label [[H1:%.*]]
@@ -19,21 +20,26 @@ define void @main(i1 %c) local_unnamed_addr #0 {
; CHECK: h2:
; CHECK-NEXT: br label [[H3:%.*]]
; CHECK: h3:
-; CHECK-NEXT: br i1 [[C:%.*]], label [[LATCH3:%.*]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK-NEXT: [[C1:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C1]], label [[LATCH3:%.*]], label [[EXIT_LOOPEXIT:%.*]]
; CHECK: latch3:
-; CHECK-NEXT: br i1 false, label [[EXIT3:%.*]], label [[H3]]
+; CHECK-NEXT: [[C2:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C2]], label [[EXIT3:%.*]], label [[H3]]
; CHECK: exit3:
; CHECK-NEXT: br label [[LATCH2:%.*]]
; CHECK: latch2:
; CHECK-NEXT: br label [[H3_1:%.*]]
; CHECK: h3.1:
-; CHECK-NEXT: br i1 [[C]], label [[LATCH3_1:%.*]], label [[EXIT_LOOPEXIT1:%.*]]
+; CHECK-NEXT: [[C1_1:%.*]] = call i1 @unknown(i32 1)
+; CHECK-NEXT: br i1 [[C1_1]], label [[LATCH3_1:%.*]], label [[EXIT_LOOPEXIT1:%.*]]
; CHECK: latch3.1:
-; CHECK-NEXT: br i1 false, label [[EXIT3_1:%.*]], label [[H3_1]]
+; CHECK-NEXT: [[C2_1:%.*]] = call i1 @unknown(i32 1)
+; CHECK-NEXT: br i1 [[C2_1]], label [[EXIT3_1:%.*]], label [[H3_1]]
; CHECK: exit3.1:
; CHECK-NEXT: br label [[LATCH2_1:%.*]]
; CHECK: latch2.1:
-; CHECK-NEXT: br i1 [[C]], label [[LATCH1]], label [[PH2]]
+; CHECK-NEXT: [[C3:%.*]] = call i1 @unknown(i32 [[D_0]])
+; CHECK-NEXT: br i1 [[C3]], label [[LATCH1]], label [[PH2]]
; CHECK: latch1:
; CHECK-NEXT: [[TMP0]] = load i32, i32* @b, align 4
; CHECK-NEXT: br label [[H1]]
@@ -62,10 +68,12 @@ h2:
br label %h3
h3:
- br i1 %c, label %latch3, label %exit
+ %c1 = call i1 @unknown(i32 %0)
+ br i1 %c1, label %latch3, label %exit
latch3:
- br i1 false, label %exit3, label %h3
+ %c2 = call i1 @unknown(i32 %0)
+ br i1 %c2, label %exit3, label %h3
exit3:
br label %latch2
@@ -76,7 +84,8 @@ latch2:
br i1 %cmp, label %h2, label %exit2
exit2:
- br i1 %c, label %latch1, label %ph2
+ %c3 = call i1 @unknown(i32 %d.0)
+ br i1 %c3, label %latch1, label %ph2
latch1: ; preds = %exit2
%1 = load i32, i32* @b, align 4
diff --git a/llvm/test/Transforms/LoopUnroll/runtime-loop-multiexit-dom-verify.ll b/llvm/test/Transforms/LoopUnroll/runtime-loop-multiexit-dom-verify.ll
index f8dab0fa2c3cb..d8ad6fe3a8318 100644
--- a/llvm/test/Transforms/LoopUnroll/runtime-loop-multiexit-dom-verify.ll
+++ b/llvm/test/Transforms/LoopUnroll/runtime-loop-multiexit-dom-verify.ll
@@ -7,6 +7,8 @@
; We explicitly set the unroll count so that expensiveTripCount computation is allowed.
+declare i1 @unknown(i32) readonly nounwind willreturn
+
; mergedexit block has edges from loop exit blocks.
define i64 @test1() {
; CHECK-LABEL: @test1(
@@ -366,7 +368,7 @@ otherexit: ; preds = %exiting
; exit block (%exitB) has an exiting block and another exit block as predecessors.
; exiting block comes from inner loop.
-define void @test5(i1 %c) {
+define void @test5() {
; CHECK-LABEL: @test5(
; CHECK-NEXT: bb:
; CHECK-NEXT: [[TMP:%.*]] = icmp sgt i32 undef, 79
@@ -380,27 +382,35 @@ define void @test5(i1 %c) {
; CHECK-NEXT: [[PROL_ITER:%.*]] = phi i32 [ 0, [[OUTERH_PROL_PREHEADER]] ], [ [[PROL_ITER_NEXT:%.*]], [[OUTERLATCH_PROL]] ]
; CHECK-NEXT: br label [[INNERH_PROL:%.*]]
; CHECK: innerH.prol:
-; CHECK-NEXT: br i1 [[C:%.*]], label [[INNEREXITING_PROL:%.*]], label [[OTHEREXITB_LOOPEXIT1:%.*]]
+; CHECK-NEXT: [[C1_PROL:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C1_PROL]], label [[INNEREXITING_PROL:%.*]], label [[OTHEREXITB_LOOPEXIT1:%.*]]
; CHECK: innerexiting.prol:
-; CHECK-NEXT: br i1 [[C]], label [[INNERLATCH_PROL:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT2:%.*]]
+; CHECK-NEXT: [[C2_PROL:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C2_PROL]], label [[INNERLATCH_PROL:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT2:%.*]]
; CHECK: innerLatch.prol:
; CHECK-NEXT: br i1 false, label [[INNERH_1_PROL:%.*]], label [[OUTERLATCH_PROL]]
; CHECK: innerH.1.prol:
-; CHECK-NEXT: br i1 [[C]], label [[INNEREXITING_1_PROL:%.*]], label [[OTHEREXITB_LOOPEXIT1]]
+; CHECK-NEXT: [[C1_1_PROL:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C1_1_PROL]], label [[INNEREXITING_1_PROL:%.*]], label [[OTHEREXITB_LOOPEXIT1]]
; CHECK: innerexiting.1.prol:
-; CHECK-NEXT: br i1 [[C]], label [[INNERLATCH_1_PROL:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT2]]
+; CHECK-NEXT: [[C2_1_PROL:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C2_1_PROL]], label [[INNERLATCH_1_PROL:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT2]]
; CHECK: innerLatch.1.prol:
; CHECK-NEXT: br i1 false, label [[INNERH_2_PROL:%.*]], label [[OUTERLATCH_PROL]]
; CHECK: innerH.2.prol:
-; CHECK-NEXT: br i1 [[C]], label [[INNEREXITING_2_PROL:%.*]], label [[OTHEREXITB_LOOPEXIT1]]
+; CHECK-NEXT: [[C1_2_PROL:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C1_2_PROL]], label [[INNEREXITING_2_PROL:%.*]], label [[OTHEREXITB_LOOPEXIT1]]
; CHECK: innerexiting.2.prol:
-; CHECK-NEXT: br i1 [[C]], label [[INNERLATCH_2_PROL:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT2]]
+; CHECK-NEXT: [[C2_2_PROL:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C2_2_PROL]], label [[INNERLATCH_2_PROL:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT2]]
; CHECK: innerLatch.2.prol:
; CHECK-NEXT: br i1 false, label [[INNERH_3_PROL:%.*]], label [[OUTERLATCH_PROL]]
; CHECK: innerH.3.prol:
-; CHECK-NEXT: br i1 [[C]], label [[INNEREXITING_3_PROL:%.*]], label [[OTHEREXITB_LOOPEXIT1]]
+; CHECK-NEXT: [[C1_3_PROL:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C1_3_PROL]], label [[INNEREXITING_3_PROL:%.*]], label [[OTHEREXITB_LOOPEXIT1]]
; CHECK: innerexiting.3.prol:
-; CHECK-NEXT: br i1 [[C]], label [[INNERLATCH_3_PROL:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT2]]
+; CHECK-NEXT: [[C2_3_PROL:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C2_3_PROL]], label [[INNERLATCH_3_PROL:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT2]]
; CHECK: innerLatch.3.prol:
; CHECK-NEXT: br i1 false, label [[INNERH_PROL]], label [[OUTERLATCH_PROL]], !llvm.loop [[LOOP6:![0-9]+]]
; CHECK: outerLatch.prol:
@@ -421,110 +431,142 @@ define void @test5(i1 %c) {
; CHECK-NEXT: [[TMP4:%.*]] = phi i32 [ [[TMP4_UNR]], [[BB1_NEW]] ], [ [[TMP6_3:%.*]], [[OUTERLATCH_3:%.*]] ]
; CHECK-NEXT: br label [[INNERH:%.*]]
; CHECK: innerH:
-; CHECK-NEXT: br i1 [[C]], label [[INNEREXITING:%.*]], label [[OTHEREXITB_LOOPEXIT_LOOPEXIT:%.*]]
+; CHECK-NEXT: [[C1:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C1]], label [[INNEREXITING:%.*]], label [[OTHEREXITB_LOOPEXIT_LOOPEXIT:%.*]]
; CHECK: innerexiting:
-; CHECK-NEXT: br i1 [[C]], label [[INNERLATCH:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT_LOOPEXIT:%.*]]
+; CHECK-NEXT: [[C2:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C2]], label [[INNERLATCH:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT_LOOPEXIT:%.*]]
; CHECK: innerLatch:
; CHECK-NEXT: br i1 false, label [[INNERH_1:%.*]], label [[OUTERLATCH:%.*]]
; CHECK: innerH.1:
-; CHECK-NEXT: br i1 [[C]], label [[INNEREXITING_1:%.*]], label [[OTHEREXITB_LOOPEXIT_LOOPEXIT]]
+; CHECK-NEXT: [[C1_1:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C1_1]], label [[INNEREXITING_1:%.*]], label [[OTHEREXITB_LOOPEXIT_LOOPEXIT]]
; CHECK: innerexiting.1:
-; CHECK-NEXT: br i1 [[C]], label [[INNERLATCH_1:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT_LOOPEXIT]]
+; CHECK-NEXT: [[C2_1:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C2_1]], label [[INNERLATCH_1:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT_LOOPEXIT]]
; CHECK: innerLatch.1:
; CHECK-NEXT: br i1 false, label [[INNERH_2:%.*]], label [[OUTERLATCH]]
; CHECK: innerH.2:
-; CHECK-NEXT: br i1 [[C]], label [[INNEREXITING_2:%.*]], label [[OTHEREXITB_LOOPEXIT_LOOPEXIT]]
+; CHECK-NEXT: [[C1_2:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C1_2]], label [[INNEREXITING_2:%.*]], label [[OTHEREXITB_LOOPEXIT_LOOPEXIT]]
; CHECK: innerexiting.2:
-; CHECK-NEXT: br i1 [[C]], label [[INNERLATCH_2:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT_LOOPEXIT]]
+; CHECK-NEXT: [[C2_2:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C2_2]], label [[INNERLATCH_2:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT_LOOPEXIT]]
; CHECK: innerLatch.2:
; CHECK-NEXT: br i1 false, label [[INNERH_3:%.*]], label [[OUTERLATCH]]
; CHECK: innerH.3:
-; CHECK-NEXT: br i1 [[C]], label [[INNEREXITING_3:%.*]], label [[OTHEREXITB_LOOPEXIT_LOOPEXIT]]
+; CHECK-NEXT: [[C1_3:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C1_3]], label [[INNEREXITING_3:%.*]], label [[OTHEREXITB_LOOPEXIT_LOOPEXIT]]
; CHECK: innerexiting.3:
-; CHECK-NEXT: br i1 [[C]], label [[INNERLATCH_3:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT_LOOPEXIT]]
+; CHECK-NEXT: [[C2_3:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C2_3]], label [[INNERLATCH_3:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT_LOOPEXIT]]
; CHECK: innerLatch.3:
; CHECK-NEXT: br i1 false, label [[INNERH]], label [[OUTERLATCH]], !llvm.loop [[LOOP6]]
; CHECK: outerLatch:
; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[TMP4]], 1
-; CHECK-NEXT: br label [[INNERH_13:%.*]]
-; CHECK: innerH.13:
-; CHECK-NEXT: br i1 [[C]], label [[INNEREXITING_14:%.*]], label [[OTHEREXITB_LOOPEXIT_LOOPEXIT12:%.*]]
-; CHECK: innerexiting.14:
-; CHECK-NEXT: br i1 [[C]], label [[INNERLATCH_15:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT_LOOPEXIT13:%.*]]
-; CHECK: innerLatch.15:
+; CHECK-NEXT: br label [[INNERH_14:%.*]]
+; CHECK: innerH.14:
+; CHECK-NEXT: [[C1_13:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C1_13]], label [[INNEREXITING_16:%.*]], label [[OTHEREXITB_LOOPEXIT_LOOPEXIT18:%.*]]
+; CHECK: innerexiting.16:
+; CHECK-NEXT: [[C2_15:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C2_15]], label [[INNERLATCH_17:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT_LOOPEXIT19:%.*]]
+; CHECK: innerLatch.17:
; CHECK-NEXT: br i1 false, label [[INNERH_1_1:%.*]], label [[OUTERLATCH_1:%.*]]
; CHECK: innerH.1.1:
-; CHECK-NEXT: br i1 [[C]], label [[INNEREXITING_1_1:%.*]], label [[OTHEREXITB_LOOPEXIT_LOOPEXIT12]]
+; CHECK-NEXT: [[C1_1_1:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C1_1_1]], label [[INNEREXITING_1_1:%.*]], label [[OTHEREXITB_LOOPEXIT_LOOPEXIT18]]
; CHECK: innerexiting.1.1:
-; CHECK-NEXT: br i1 [[C]], label [[INNERLATCH_1_1:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT_LOOPEXIT13]]
+; CHECK-NEXT: [[C2_1_1:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C2_1_1]], label [[INNERLATCH_1_1:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT_LOOPEXIT19]]
; CHECK: innerLatch.1.1:
; CHECK-NEXT: br i1 false, label [[INNERH_2_1:%.*]], label [[OUTERLATCH_1]]
; CHECK: innerH.2.1:
-; CHECK-NEXT: br i1 [[C]], label [[INNEREXITING_2_1:%.*]], label [[OTHEREXITB_LOOPEXIT_LOOPEXIT12]]
+; CHECK-NEXT: [[C1_2_1:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C1_2_1]], label [[INNEREXITING_2_1:%.*]], label [[OTHEREXITB_LOOPEXIT_LOOPEXIT18]]
; CHECK: innerexiting.2.1:
-; CHECK-NEXT: br i1 [[C]], label [[INNERLATCH_2_1:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT_LOOPEXIT13]]
+; CHECK-NEXT: [[C2_2_1:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C2_2_1]], label [[INNERLATCH_2_1:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT_LOOPEXIT19]]
; CHECK: innerLatch.2.1:
; CHECK-NEXT: br i1 false, label [[INNERH_3_1:%.*]], label [[OUTERLATCH_1]]
; CHECK: innerH.3.1:
-; CHECK-NEXT: br i1 [[C]], label [[INNEREXITING_3_1:%.*]], label [[OTHEREXITB_LOOPEXIT_LOOPEXIT12]]
+; CHECK-NEXT: [[C1_3_1:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C1_3_1]], label [[INNEREXITING_3_1:%.*]], label [[OTHEREXITB_LOOPEXIT_LOOPEXIT18]]
; CHECK: innerexiting.3.1:
-; CHECK-NEXT: br i1 [[C]], label [[INNERLATCH_3_1:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT_LOOPEXIT13]]
+; CHECK-NEXT: [[C2_3_1:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C2_3_1]], label [[INNERLATCH_3_1:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT_LOOPEXIT19]]
; CHECK: innerLatch.3.1:
-; CHECK-NEXT: br i1 false, label [[INNERH_13]], label [[OUTERLATCH_1]], !llvm.loop [[LOOP6]]
+; CHECK-NEXT: br i1 false, label [[INNERH_14]], label [[OUTERLATCH_1]], !llvm.loop [[LOOP6]]
; CHECK: outerLatch.1:
; CHECK-NEXT: [[TMP6_1:%.*]] = add i32 [[TMP6]], 1
-; CHECK-NEXT: br label [[INNERH_26:%.*]]
-; CHECK: innerH.26:
-; CHECK-NEXT: br i1 [[C]], label [[INNEREXITING_27:%.*]], label [[OTHEREXITB_LOOPEXIT_LOOPEXIT14:%.*]]
-; CHECK: innerexiting.27:
-; CHECK-NEXT: br i1 [[C]], label [[INNERLATCH_28:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT_LOOPEXIT15:%.*]]
-; CHECK: innerLatch.28:
+; CHECK-NEXT: br label [[INNERH_29:%.*]]
+; CHECK: innerH.29:
+; CHECK-NEXT: [[C1_28:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C1_28]], label [[INNEREXITING_211:%.*]], label [[OTHEREXITB_LOOPEXIT_LOOPEXIT20:%.*]]
+; CHECK: innerexiting.211:
+; CHECK-NEXT: [[C2_210:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C2_210]], label [[INNERLATCH_212:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT_LOOPEXIT21:%.*]]
+; CHECK: innerLatch.212:
; CHECK-NEXT: br i1 false, label [[INNERH_1_2:%.*]], label [[OUTERLATCH_2:%.*]]
; CHECK: innerH.1.2:
-; CHECK-NEXT: br i1 [[C]], label [[INNEREXITING_1_2:%.*]], label [[OTHEREXITB_LOOPEXIT_LOOPEXIT14]]
+; CHECK-NEXT: [[C1_1_2:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C1_1_2]], label [[INNEREXITING_1_2:%.*]], label [[OTHEREXITB_LOOPEXIT_LOOPEXIT20]]
; CHECK: innerexiting.1.2:
-; CHECK-NEXT: br i1 [[C]], label [[INNERLATCH_1_2:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT_LOOPEXIT15]]
+; CHECK-NEXT: [[C2_1_2:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C2_1_2]], label [[INNERLATCH_1_2:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT_LOOPEXIT21]]
; CHECK: innerLatch.1.2:
; CHECK-NEXT: br i1 false, label [[INNERH_2_2:%.*]], label [[OUTERLATCH_2]]
; CHECK: innerH.2.2:
-; CHECK-NEXT: br i1 [[C]], label [[INNEREXITING_2_2:%.*]], label [[OTHEREXITB_LOOPEXIT_LOOPEXIT14]]
+; CHECK-NEXT: [[C1_2_2:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C1_2_2]], label [[INNEREXITING_2_2:%.*]], label [[OTHEREXITB_LOOPEXIT_LOOPEXIT20]]
; CHECK: innerexiting.2.2:
-; CHECK-NEXT: br i1 [[C]], label [[INNERLATCH_2_2:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT_LOOPEXIT15]]
+; CHECK-NEXT: [[C2_2_2:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C2_2_2]], label [[INNERLATCH_2_2:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT_LOOPEXIT21]]
; CHECK: innerLatch.2.2:
; CHECK-NEXT: br i1 false, label [[INNERH_3_2:%.*]], label [[OUTERLATCH_2]]
; CHECK: innerH.3.2:
-; CHECK-NEXT: br i1 [[C]], label [[INNEREXITING_3_2:%.*]], label [[OTHEREXITB_LOOPEXIT_LOOPEXIT14]]
+; CHECK-NEXT: [[C1_3_2:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C1_3_2]], label [[INNEREXITING_3_2:%.*]], label [[OTHEREXITB_LOOPEXIT_LOOPEXIT20]]
; CHECK: innerexiting.3.2:
-; CHECK-NEXT: br i1 [[C]], label [[INNERLATCH_3_2:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT_LOOPEXIT15]]
+; CHECK-NEXT: [[C2_3_2:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C2_3_2]], label [[INNERLATCH_3_2:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT_LOOPEXIT21]]
; CHECK: innerLatch.3.2:
-; CHECK-NEXT: br i1 false, label [[INNERH_26]], label [[OUTERLATCH_2]], !llvm.loop [[LOOP6]]
+; CHECK-NEXT: br i1 false, label [[INNERH_29]], label [[OUTERLATCH_2]], !llvm.loop [[LOOP6]]
; CHECK: outerLatch.2:
; CHECK-NEXT: [[TMP6_2:%.*]] = add i32 [[TMP6_1]], 1
-; CHECK-NEXT: br label [[INNERH_39:%.*]]
-; CHECK: innerH.39:
-; CHECK-NEXT: br i1 [[C]], label [[INNEREXITING_310:%.*]], label [[OTHEREXITB_LOOPEXIT_LOOPEXIT16:%.*]]
-; CHECK: innerexiting.310:
-; CHECK-NEXT: br i1 [[C]], label [[INNERLATCH_311:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT_LOOPEXIT17:%.*]]
-; CHECK: innerLatch.311:
+; CHECK-NEXT: br label [[INNERH_314:%.*]]
+; CHECK: innerH.314:
+; CHECK-NEXT: [[C1_313:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C1_313]], label [[INNEREXITING_316:%.*]], label [[OTHEREXITB_LOOPEXIT_LOOPEXIT22:%.*]]
+; CHECK: innerexiting.316:
+; CHECK-NEXT: [[C2_315:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C2_315]], label [[INNERLATCH_317:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT_LOOPEXIT23:%.*]]
+; CHECK: innerLatch.317:
; CHECK-NEXT: br i1 false, label [[INNERH_1_3:%.*]], label [[OUTERLATCH_3]]
; CHECK: innerH.1.3:
-; CHECK-NEXT: br i1 [[C]], label [[INNEREXITING_1_3:%.*]], label [[OTHEREXITB_LOOPEXIT_LOOPEXIT16]]
+; CHECK-NEXT: [[C1_1_3:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C1_1_3]], label [[INNEREXITING_1_3:%.*]], label [[OTHEREXITB_LOOPEXIT_LOOPEXIT22]]
; CHECK: innerexiting.1.3:
-; CHECK-NEXT: br i1 [[C]], label [[INNERLATCH_1_3:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT_LOOPEXIT17]]
+; CHECK-NEXT: [[C2_1_3:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C2_1_3]], label [[INNERLATCH_1_3:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT_LOOPEXIT23]]
; CHECK: innerLatch.1.3:
; CHECK-NEXT: br i1 false, label [[INNERH_2_3:%.*]], label [[OUTERLATCH_3]]
; CHECK: innerH.2.3:
-; CHECK-NEXT: br i1 [[C]], label [[INNEREXITING_2_3:%.*]], label [[OTHEREXITB_LOOPEXIT_LOOPEXIT16]]
+; CHECK-NEXT: [[C1_2_3:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C1_2_3]], label [[INNEREXITING_2_3:%.*]], label [[OTHEREXITB_LOOPEXIT_LOOPEXIT22]]
; CHECK: innerexiting.2.3:
-; CHECK-NEXT: br i1 [[C]], label [[INNERLATCH_2_3:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT_LOOPEXIT17]]
+; CHECK-NEXT: [[C2_2_3:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C2_2_3]], label [[INNERLATCH_2_3:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT_LOOPEXIT23]]
; CHECK: innerLatch.2.3:
; CHECK-NEXT: br i1 false, label [[INNERH_3_3:%.*]], label [[OUTERLATCH_3]]
; CHECK: innerH.3.3:
-; CHECK-NEXT: br i1 [[C]], label [[INNEREXITING_3_3:%.*]], label [[OTHEREXITB_LOOPEXIT_LOOPEXIT16]]
+; CHECK-NEXT: [[C1_3_3:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C1_3_3]], label [[INNEREXITING_3_3:%.*]], label [[OTHEREXITB_LOOPEXIT_LOOPEXIT22]]
; CHECK: innerexiting.3.3:
-; CHECK-NEXT: br i1 [[C]], label [[INNERLATCH_3_3:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT_LOOPEXIT17]]
+; CHECK-NEXT: [[C2_3_3:%.*]] = call i1 @unknown(i32 0)
+; CHECK-NEXT: br i1 [[C2_3_3]], label [[INNERLATCH_3_3:%.*]], label [[EXITB_LOOPEXIT_LOOPEXIT_LOOPEXIT23]]
; CHECK: innerLatch.3.3:
-; CHECK-NEXT: br i1 false, label [[INNERH_39]], label [[OUTERLATCH_3]], !llvm.loop [[LOOP6]]
+; CHECK-NEXT: br i1 false, label [[INNERH_314]], label [[OUTERLATCH_3]], !llvm.loop [[LOOP6]]
; CHECK: outerLatch.3:
; CHECK-NEXT: [[TMP6_3]] = add i32 [[TMP6_2]], 1
; CHECK-NEXT: [[TMP7_3:%.*]] = icmp sgt i32 [[TMP6_3]], 79
@@ -537,11 +579,11 @@ define void @test5(i1 %c) {
; CHECK-NEXT: ret void
; CHECK: exitB.loopexit.loopexit.loopexit:
; CHECK-NEXT: br label [[EXITB_LOOPEXIT_LOOPEXIT:%.*]]
-; CHECK: exitB.loopexit.loopexit.loopexit13:
+; CHECK: exitB.loopexit.loopexit.loopexit19:
; CHECK-NEXT: br label [[EXITB_LOOPEXIT_LOOPEXIT]]
-; CHECK: exitB.loopexit.loopexit.loopexit15:
+; CHECK: exitB.loopexit.loopexit.loopexit21:
; CHECK-NEXT: br label [[EXITB_LOOPEXIT_LOOPEXIT]]
-; CHECK: exitB.loopexit.loopexit.loopexit17:
+; CHECK: exitB.loopexit.loopexit.loopexit23:
; CHECK-NEXT: br label [[EXITB_LOOPEXIT_LOOPEXIT]]
; CHECK: exitB.loopexit.loopexit:
; CHECK-NEXT: br label [[EXITB_LOOPEXIT:%.*]]
@@ -553,11 +595,11 @@ define void @test5(i1 %c) {
; CHECK-NEXT: ret void
; CHECK: otherexitB.loopexit.loopexit:
; CHECK-NEXT: br label [[OTHEREXITB_LOOPEXIT:%.*]]
-; CHECK: otherexitB.loopexit.loopexit12:
+; CHECK: otherexitB.loopexit.loopexit18:
; CHECK-NEXT: br label [[OTHEREXITB_LOOPEXIT]]
-; CHECK: otherexitB.loopexit.loopexit14:
+; CHECK: otherexitB.loopexit.loopexit20:
; CHECK-NEXT: br label [[OTHEREXITB_LOOPEXIT]]
-; CHECK: otherexitB.loopexit.loopexit16:
+; CHECK: otherexitB.loopexit.loopexit22:
; CHECK-NEXT: br label [[OTHEREXITB_LOOPEXIT]]
; CHECK: otherexitB.loopexit:
; CHECK-NEXT: br label [[OTHEREXITB:%.*]]
@@ -578,10 +620,12 @@ outerH: ; preds = %outerLatch, %bb1
br label %innerH
innerH: ; preds = %innerLatch, %outerH
- br i1 %c, label %innerexiting, label %otherexitB
+ %c1 = call i1 @unknown(i32 0)
+ br i1 %c1, label %innerexiting, label %otherexitB
innerexiting: ; preds = %innerH
- br i1 %c, label %innerLatch, label %exitB
+ %c2 = call i1 @unknown(i32 0)
+ br i1 %c2, label %innerLatch, label %exitB
innerLatch: ; preds = %innerexiting
%tmp13 = fcmp olt double undef, 2.000000e+00
@@ -605,7 +649,7 @@ otherexitB: ; preds = %innerH
; Blocks reachable from exits (not_zero44) have the IDom as the block within the loop (Header).
; Update the IDom to the preheader.
-define void @test6(i1 %c) {
+define void @test6() {
; CHECK-LABEL: @test6(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 undef, i64 616)
@@ -621,7 +665,9 @@ define void @test6(i1 %c) {
; CHECK: header.prol:
; CHECK-NEXT: [[INDVARS_IV_PROL:%.*]] = phi i64 [ undef, [[HEADER_PROL_PREHEADER]] ], [ [[INDVARS_IV_NEXT_PROL:%.*]], [[LATCH_PROL:%.*]] ]
; CHECK-NEXT: [[PROL_ITER:%.*]] = phi i64 [ 0, [[HEADER_PROL_PREHEADER]] ], [ [[PROL_ITER_NEXT:%.*]], [[LATCH_PROL]] ]
-; CHECK-NEXT: br i1 [[C:%.*]], label [[LATCH_PROL]], label [[OTHEREXIT_LOOPEXIT1:%.*]]
+; CHECK-NEXT: [[IV_I32_PROL:%.*]] = trunc i64 [[INDVARS_IV_PROL]] to i32
+; CHECK-NEXT: [[C1_PROL:%.*]] = call i1 @unknown(i32 [[IV_I32_PROL]])
+; CHECK-NEXT: br i1 [[C1_PROL]], label [[LATCH_PROL]], label [[OTHEREXIT_LOOPEXIT1:%.*]]
; CHECK: latch.prol:
; CHECK-NEXT: [[INDVARS_IV_NEXT_PROL]] = add nsw i64 [[INDVARS_IV_PROL]], 2
; CHECK-NEXT: [[TMP4:%.*]] = icmp slt i64 [[INDVARS_IV_NEXT_PROL]], 616
@@ -639,16 +685,24 @@ define void @test6(i1 %c) {
; CHECK-NEXT: br label [[HEADER:%.*]]
; CHECK: header:
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_UNR]], [[ENTRY_NEW]] ], [ [[INDVARS_IV_NEXT_3:%.*]], [[LATCH_3:%.*]] ]
-; CHECK-NEXT: br i1 [[C]], label [[LATCH:%.*]], label [[OTHEREXIT_LOOPEXIT:%.*]]
+; CHECK-NEXT: [[IV_I32:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-NEXT: [[C1:%.*]] = call i1 @unknown(i32 [[IV_I32]])
+; CHECK-NEXT: br i1 [[C1]], label [[LATCH:%.*]], label [[OTHEREXIT_LOOPEXIT:%.*]]
; CHECK: latch:
; CHECK-NEXT: [[INDVARS_IV_NEXT:%.*]] = add nsw i64 [[INDVARS_IV]], 2
-; CHECK-NEXT: br i1 [[C]], label [[LATCH_1:%.*]], label [[OTHEREXIT_LOOPEXIT]]
+; CHECK-NEXT: [[IV_I32_1:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32
+; CHECK-NEXT: [[C1_1:%.*]] = call i1 @unknown(i32 [[IV_I32_1]])
+; CHECK-NEXT: br i1 [[C1_1]], label [[LATCH_1:%.*]], label [[OTHEREXIT_LOOPEXIT]]
; CHECK: latch.1:
; CHECK-NEXT: [[INDVARS_IV_NEXT_1:%.*]] = add nsw i64 [[INDVARS_IV_NEXT]], 2
-; CHECK-NEXT: br i1 [[C]], label [[LATCH_2:%.*]], label [[OTHEREXIT_LOOPEXIT]]
+; CHECK-NEXT: [[IV_I32_2:%.*]] = trunc i64 [[INDVARS_IV_NEXT_1]] to i32
+; CHECK-NEXT: [[C1_2:%.*]] = call i1 @unknown(i32 [[IV_I32_2]])
+; CHECK-NEXT: br i1 [[C1_2]], label [[LATCH_2:%.*]], label [[OTHEREXIT_LOOPEXIT]]
; CHECK: latch.2:
; CHECK-NEXT: [[INDVARS_IV_NEXT_2:%.*]] = add nsw i64 [[INDVARS_IV_NEXT_1]], 2
-; CHECK-NEXT: br i1 [[C]], label [[LATCH_3]], label [[OTHEREXIT_LOOPEXIT]]
+; CHECK-NEXT: [[IV_I32_3:%.*]] = trunc i64 [[INDVARS_IV_NEXT_2]] to i32
+; CHECK-NEXT: [[C1_3:%.*]] = call i1 @unknown(i32 [[IV_I32_3]])
+; CHECK-NEXT: br i1 [[C1_3]], label [[LATCH_3]], label [[OTHEREXIT_LOOPEXIT]]
; CHECK: latch.3:
; CHECK-NEXT: [[INDVARS_IV_NEXT_3]] = add nsw i64 [[INDVARS_IV_NEXT_2]], 2
; CHECK-NEXT: [[TMP6:%.*]] = icmp slt i64 [[INDVARS_IV_NEXT_3]], 616
@@ -675,7 +729,9 @@ entry:
header: ; preds = %latch, %entry
%indvars.iv = phi i64 [ undef, %entry ], [ %indvars.iv.next, %latch ]
- br i1 %c, label %latch, label %otherexit
+ %iv.i32 = trunc i64 %indvars.iv to i32
+ %c1 = call i1 @unknown(i32 %iv.i32)
+ br i1 %c1, label %latch, label %otherexit
latch: ; preds = %header
%indvars.iv.next = add nsw i64 %indvars.iv, 2
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