[PATCH] D116468: [AArch64] Combine ADD/SUB instructions when they contain a 24-bit immediate.

[Dave Green via Phabricator via llvm-commits]

dmgreen added a comment.

Oh interesting. This is similar to D111034 <https://reviews.llvm.org/D111034>, but that was reverted again. I'm not sure why, apparently MIPeephole optimizations are all too easy to get wrong.

The problem with doing this is when it is done in a loop. Something like this example: https://godbolt.org/z/e5f4hWGcq, where preferably the loop invariant mov can be hoisted out of the loop, leaving a single add. Can we make sure there is a test case for that example, and try and guard against it?

Also, I think a ADD+MOVi16 might be slightly better than a ADD+ADD. (As in - the MOV is a 16bit imm that can be materialized with a single instruction). The two ADDs might make a longer critical path. It's if the MOV pseudo would need multiple instructions that the add becomes beneficial.


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https://reviews.llvm.org/D116468