[PATCH] D116397: [RISCV] Add an MIR pass to replace redundant sext.w instructions with copies.

[Kito Cheng via Phabricator via llvm-commits]

kito-cheng added a comment.

Oh I take a closer look,  one def (no phi) or not should not matter, I tried to add `MachineCopyPropagation` but not work since it require non-SSA, in theory we could remove that by a simple copy propagation after this pass.

Before:

  bb.5.if.end.us.us:
  ; predecessors: %bb.4, %bb.6
    successors: %bb.6(0x7ffff800), %bb.11(0x00000800); %bb.6(100.00%), %bb.11(0.00%)
  
    %3:gpr = PHI %1:gpr, %bb.4, %4:gpr, %bb.6
    %23:gpr = COPY $x0
    BNE %22:gpr, %23:gpr, %bb.11
    PseudoBR %bb.6
  
  bb.6.if.end8.us.us:
  ; predecessors: %bb.5
    successors: %bb.10(0x04000000), %bb.5(0x7c000000); %bb.10(3.12%), %bb.5(96.88%)
  
    %4:gpr = ADDIW %3:gpr, 1
    %25:gpr = ADDIW %3:gpr, 0
    BEQ killed %25:gpr, %21:gpr, %bb.10
    PseudoBR %bb.5

After:

  bb.5.if.end.us.us:
  ; predecessors: %bb.4, %bb.6 
    successors: %bb.6(0x7ffff800), %bb.11(0x00000800); %bb.6(100.00%), %bb.11(0.00%)
  
    %3:gpr = PHI %1:gpr, %bb.4, %4:gpr, %bb.6 
    %23:gpr = COPY $x0
    BNE %22:gpr, %23:gpr, %bb.11
    PseudoBR %bb.6 
  
  bb.6.if.end8.us.us:
  ; predecessors: %bb.5 
    successors: %bb.10(0x04000000), %bb.5(0x7c000000); %bb.10(3.12%), %bb.5(96.88%)
  
    %4:gpr = ADDIW %3:gpr, 1
    %25:gpr = COPY %3:gpr
    BEQ killed %25:gpr, %21:gpr, %bb.10
    PseudoBR %bb.5 


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D116397/new/

https://reviews.llvm.org/D116397