[llvm] 7e163af - Remove redundant void arguments (NFC)
Kazu Hirata via llvm-commits
llvm-commits at lists.llvm.org
Sun Jan 2 10:20:54 PST 2022
Author: Kazu Hirata
Date: 2022-01-02T10:20:19-08:00
New Revision: 7e163afd9ec7cb4a23bda681c22a2c6e7387049d
URL: https://github.com/llvm/llvm-project/commit/7e163afd9ec7cb4a23bda681c22a2c6e7387049d
DIFF: https://github.com/llvm/llvm-project/commit/7e163afd9ec7cb4a23bda681c22a2c6e7387049d.diff
LOG: Remove redundant void arguments (NFC)
Identified by modernize-redundant-void-arg.
Added:
Modified:
lldb/include/lldb/Symbol/UnwindPlan.h
lldb/source/Target/Thread.cpp
llvm/include/llvm/MCA/Instruction.h
llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.h
llvm/lib/CodeGen/TypePromotion.cpp
llvm/lib/Target/BPF/BPFMIChecking.cpp
llvm/lib/Target/BPF/BPFMIPeephole.cpp
llvm/lib/Target/BPF/BPFMISimplifyPatchable.cpp
llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
llvm/lib/Target/SystemZ/SystemZSubtarget.h
llvm/lib/Target/VE/VESubtarget.h
llvm/lib/Target/X86/X86ISelLowering.h
llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
llvm/lib/Transforms/Vectorize/VPlanPredicator.h
llvm/tools/llvm-objcopy/MachO/MachOWriter.cpp
Removed:
################################################################################
diff --git a/lldb/include/lldb/Symbol/UnwindPlan.h b/lldb/include/lldb/Symbol/UnwindPlan.h
index cc2302d25831b..7b0fbe87315c5 100644
--- a/lldb/include/lldb/Symbol/UnwindPlan.h
+++ b/lldb/include/lldb/Symbol/UnwindPlan.h
@@ -442,7 +442,7 @@ class UnwindPlan {
m_return_addr_register = regnum;
}
- uint32_t GetReturnAddressRegister(void) { return m_return_addr_register; }
+ uint32_t GetReturnAddressRegister() { return m_return_addr_register; }
uint32_t GetInitialCFARegister() const {
if (m_row_list.empty())
diff --git a/lldb/source/Target/Thread.cpp b/lldb/source/Target/Thread.cpp
index 481a39a576e9a..c5f16b4e6c1d9 100644
--- a/lldb/source/Target/Thread.cpp
+++ b/lldb/source/Target/Thread.cpp
@@ -471,9 +471,7 @@ void Thread::SetStopInfoToNothing() {
StopInfo::CreateStopReasonWithSignal(*this, LLDB_INVALID_SIGNAL_NUMBER));
}
-bool Thread::ThreadStoppedForAReason(void) {
- return (bool)GetPrivateStopInfo();
-}
+bool Thread::ThreadStoppedForAReason() { return (bool)GetPrivateStopInfo(); }
bool Thread::CheckpointThreadState(ThreadStateCheckpoint &saved_state) {
saved_state.register_backup_sp.reset();
diff --git a/llvm/include/llvm/MCA/Instruction.h b/llvm/include/llvm/MCA/Instruction.h
index 3eb32186d5513..089c607749f1d 100644
--- a/llvm/include/llvm/MCA/Instruction.h
+++ b/llvm/include/llvm/MCA/Instruction.h
@@ -406,7 +406,7 @@ class CycleSegment {
bool operator<(const CycleSegment &Other) const {
return Begin < Other.Begin;
}
- CycleSegment &operator--(void) {
+ CycleSegment &operator--() {
if (Begin)
Begin--;
if (End)
diff --git a/llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.h b/llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.h
index 789205e61cdb3..6423ff74b563a 100644
--- a/llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.h
+++ b/llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.h
@@ -494,7 +494,7 @@ class MLocTracker {
return StackIdxesToPos.find(Idx)->second;
}
- unsigned getNumLocs(void) const { return LocIdxToIDNum.size(); }
+ unsigned getNumLocs() const { return LocIdxToIDNum.size(); }
/// Reset all locations to contain a PHI value at the designated block. Used
/// sometimes for actual PHI values, othertimes to indicate the block entry
@@ -516,7 +516,7 @@ class MLocTracker {
}
/// Wipe any un-necessary location records after traversing a block.
- void reset(void) {
+ void reset() {
// We could reset all the location values too; however either loadFromArray
// or setMPhis should be called before this object is re-used. Just
// clear Masks, they're definitely not needed.
@@ -525,7 +525,7 @@ class MLocTracker {
/// Clear all data. Destroys the LocID <=> LocIdx map, which makes most of
/// the information in this pass uninterpretable.
- void clear(void) {
+ void clear() {
reset();
LocIDToLocIdx.clear();
LocIdxToLocID.clear();
diff --git a/llvm/lib/CodeGen/TypePromotion.cpp b/llvm/lib/CodeGen/TypePromotion.cpp
index d042deefd746a..01ea171e5ea2e 100644
--- a/llvm/lib/CodeGen/TypePromotion.cpp
+++ b/llvm/lib/CodeGen/TypePromotion.cpp
@@ -116,11 +116,11 @@ class IRPromoter {
SmallPtrSet<Value*, 8> Promoted;
void ReplaceAllUsersOfWith(Value *From, Value *To);
- void ExtendSources(void);
- void ConvertTruncs(void);
- void PromoteTree(void);
- void TruncateSinks(void);
- void Cleanup(void);
+ void ExtendSources();
+ void ConvertTruncs();
+ void PromoteTree();
+ void TruncateSinks();
+ void Cleanup();
public:
IRPromoter(LLVMContext &C, IntegerType *Ty, unsigned Width,
diff --git a/llvm/lib/Target/BPF/BPFMIChecking.cpp b/llvm/lib/Target/BPF/BPFMIChecking.cpp
index eb8c48ac49dec..2bc2302cf55cd 100644
--- a/llvm/lib/Target/BPF/BPFMIChecking.cpp
+++ b/llvm/lib/Target/BPF/BPFMIChecking.cpp
@@ -41,7 +41,7 @@ struct BPFMIPreEmitChecking : public MachineFunctionPass {
// Initialize class variables.
void initialize(MachineFunction &MFParm);
- bool processAtomicInsts(void);
+ bool processAtomicInsts();
public:
@@ -151,7 +151,7 @@ static bool hasLiveDefs(const MachineInstr &MI, const TargetRegisterInfo *TRI) {
return false;
}
-bool BPFMIPreEmitChecking::processAtomicInsts(void) {
+bool BPFMIPreEmitChecking::processAtomicInsts() {
for (MachineBasicBlock &MBB : *MF) {
for (MachineInstr &MI : MBB) {
if (MI.getOpcode() != BPF::XADDW &&
diff --git a/llvm/lib/Target/BPF/BPFMIPeephole.cpp b/llvm/lib/Target/BPF/BPFMIPeephole.cpp
index 354980e4bf3ce..7f69c8a634438 100644
--- a/llvm/lib/Target/BPF/BPFMIPeephole.cpp
+++ b/llvm/lib/Target/BPF/BPFMIPeephole.cpp
@@ -56,8 +56,8 @@ struct BPFMIPeephole : public MachineFunctionPass {
bool isInsnFrom32Def(MachineInstr *DefInsn);
bool isPhiFrom32Def(MachineInstr *MovMI);
bool isMovFrom32Def(MachineInstr *MovMI);
- bool eliminateZExtSeq(void);
- bool eliminateZExt(void);
+ bool eliminateZExtSeq();
+ bool eliminateZExt();
std::set<MachineInstr *> PhiInsns;
@@ -172,7 +172,7 @@ bool BPFMIPeephole::isMovFrom32Def(MachineInstr *MovMI)
return true;
}
-bool BPFMIPeephole::eliminateZExtSeq(void) {
+bool BPFMIPeephole::eliminateZExtSeq() {
MachineInstr* ToErase = nullptr;
bool Eliminated = false;
@@ -240,7 +240,7 @@ bool BPFMIPeephole::eliminateZExtSeq(void) {
return Eliminated;
}
-bool BPFMIPeephole::eliminateZExt(void) {
+bool BPFMIPeephole::eliminateZExt() {
MachineInstr* ToErase = nullptr;
bool Eliminated = false;
@@ -312,7 +312,7 @@ struct BPFMIPreEmitPeephole : public MachineFunctionPass {
// Initialize class variables.
void initialize(MachineFunction &MFParm);
- bool eliminateRedundantMov(void);
+ bool eliminateRedundantMov();
public:
@@ -334,7 +334,7 @@ void BPFMIPreEmitPeephole::initialize(MachineFunction &MFParm) {
LLVM_DEBUG(dbgs() << "*** BPF PreEmit peephole pass ***\n\n");
}
-bool BPFMIPreEmitPeephole::eliminateRedundantMov(void) {
+bool BPFMIPreEmitPeephole::eliminateRedundantMov() {
MachineInstr* ToErase = nullptr;
bool Eliminated = false;
@@ -405,7 +405,7 @@ struct BPFMIPeepholeTruncElim : public MachineFunctionPass {
// Initialize class variables.
void initialize(MachineFunction &MFParm);
- bool eliminateTruncSeq(void);
+ bool eliminateTruncSeq();
public:
@@ -452,7 +452,7 @@ void BPFMIPeepholeTruncElim::initialize(MachineFunction &MFParm) {
// are 32-bit registers, but later on, kernel verifier will rewrite
// it with 64-bit value. Therefore, truncating the value after the
// load will result in incorrect code.
-bool BPFMIPeepholeTruncElim::eliminateTruncSeq(void) {
+bool BPFMIPeepholeTruncElim::eliminateTruncSeq() {
MachineInstr* ToErase = nullptr;
bool Eliminated = false;
diff --git a/llvm/lib/Target/BPF/BPFMISimplifyPatchable.cpp b/llvm/lib/Target/BPF/BPFMISimplifyPatchable.cpp
index 7e829ea43e89f..b4232875383c8 100644
--- a/llvm/lib/Target/BPF/BPFMISimplifyPatchable.cpp
+++ b/llvm/lib/Target/BPF/BPFMISimplifyPatchable.cpp
@@ -55,7 +55,7 @@ struct BPFMISimplifyPatchable : public MachineFunctionPass {
// Initialize class variables.
void initialize(MachineFunction &MFParm);
- bool removeLD(void);
+ bool removeLD();
void processCandidate(MachineRegisterInfo *MRI, MachineBasicBlock &MBB,
MachineInstr &MI, Register &SrcReg, Register &DstReg,
const GlobalValue *GVal, bool IsAma);
diff --git a/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp b/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
index d12a9b806fd03..3b485be397360 100644
--- a/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
+++ b/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
@@ -107,10 +107,10 @@ struct PPCMIPeephole : public MachineFunctionPass {
void initialize(MachineFunction &MFParm);
// Perform peepholes.
- bool simplifyCode(void);
+ bool simplifyCode();
// Perform peepholes.
- bool eliminateRedundantCompare(void);
+ bool eliminateRedundantCompare();
bool eliminateRedundantTOCSaves(std::map<MachineInstr *, bool> &TOCSaves);
bool combineSEXTAndSHL(MachineInstr &MI, MachineInstr *&ToErase);
bool emitRLDICWhenLoweringJumpTables(MachineInstr &MI);
@@ -381,7 +381,7 @@ static void convertUnprimedAccPHIs(const PPCInstrInfo *TII,
}
// Perform peephole optimizations.
-bool PPCMIPeephole::simplifyCode(void) {
+bool PPCMIPeephole::simplifyCode() {
bool Simplified = false;
bool TrapOpt = false;
MachineInstr* ToErase = nullptr;
@@ -1334,7 +1334,7 @@ bool PPCMIPeephole::eliminateRedundantTOCSaves(
// cmpwi r3, 0 ; greather than -1 means greater or equal to 0
// bge 0, .LBB0_4
-bool PPCMIPeephole::eliminateRedundantCompare(void) {
+bool PPCMIPeephole::eliminateRedundantCompare() {
bool Simplified = false;
for (MachineBasicBlock &MBB2 : *MF) {
diff --git a/llvm/lib/Target/SystemZ/SystemZSubtarget.h b/llvm/lib/Target/SystemZ/SystemZSubtarget.h
index 67c5b8eb09b69..98f7094fcb48d 100644
--- a/llvm/lib/Target/SystemZ/SystemZSubtarget.h
+++ b/llvm/lib/Target/SystemZ/SystemZSubtarget.h
@@ -85,7 +85,7 @@ class SystemZSubtarget : public SystemZGenSubtargetInfo {
SystemZSubtarget &initializeSubtargetDependencies(StringRef CPU,
StringRef FS);
- SystemZCallingConventionRegisters *initializeSpecialRegisters(void);
+ SystemZCallingConventionRegisters *initializeSpecialRegisters();
public:
SystemZSubtarget(const Triple &TT, const std::string &CPU,
diff --git a/llvm/lib/Target/VE/VESubtarget.h b/llvm/lib/Target/VE/VESubtarget.h
index 213aca2ea3f96..0c3dc0a080723 100644
--- a/llvm/lib/Target/VE/VESubtarget.h
+++ b/llvm/lib/Target/VE/VESubtarget.h
@@ -76,7 +76,7 @@ class VESubtarget : public VEGenSubtargetInfo {
/// Get the size of RSA, return address, and frame pointer as described
/// in VEFrameLowering.cpp.
- unsigned getRsaSize(void) const { return 176; };
+ unsigned getRsaSize() const { return 176; };
bool isTargetLinux() const { return TargetTriple.isOSLinux(); }
};
diff --git a/llvm/lib/Target/X86/X86ISelLowering.h b/llvm/lib/Target/X86/X86ISelLowering.h
index d1d6e319f16bc..3f6d567d3f4de 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.h
+++ b/llvm/lib/Target/X86/X86ISelLowering.h
@@ -1540,7 +1540,7 @@ namespace llvm {
unsigned GetAlignedArgumentStackSize(unsigned StackSize,
SelectionDAG &DAG) const;
- unsigned getAddressSpace(void) const;
+ unsigned getAddressSpace() const;
SDValue FP_TO_INTHelper(SDValue Op, SelectionDAG &DAG, bool IsSigned,
SDValue &Chain) const;
diff --git a/llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp b/llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
index 86ecd68178738..e879a33db6ee9 100644
--- a/llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
+++ b/llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
@@ -231,7 +231,7 @@ void VPlanPredicator::linearizeRegionRec(VPRegionBlock *Region) {
}
// Entry point. The driver function for the predicator.
-void VPlanPredicator::predicate(void) {
+void VPlanPredicator::predicate() {
// Predicate the blocks within Region.
predicateRegionRec(cast<VPRegionBlock>(Plan.getEntry()));
diff --git a/llvm/lib/Transforms/Vectorize/VPlanPredicator.h b/llvm/lib/Transforms/Vectorize/VPlanPredicator.h
index 692afd2978d53..a5db9a54da3cd 100644
--- a/llvm/lib/Transforms/Vectorize/VPlanPredicator.h
+++ b/llvm/lib/Transforms/Vectorize/VPlanPredicator.h
@@ -68,7 +68,7 @@ class VPlanPredicator {
VPlanPredicator(VPlan &Plan);
/// Predicate Plan's HCFG.
- void predicate(void);
+ void predicate();
};
} // end namespace llvm
#endif // LLVM_TRANSFORMS_VECTORIZE_VPLAN_PREDICATOR_H
diff --git a/llvm/tools/llvm-objcopy/MachO/MachOWriter.cpp b/llvm/tools/llvm-objcopy/MachO/MachOWriter.cpp
index 688945afe9445..52f20794cc574 100644
--- a/llvm/tools/llvm-objcopy/MachO/MachOWriter.cpp
+++ b/llvm/tools/llvm-objcopy/MachO/MachOWriter.cpp
@@ -614,7 +614,7 @@ void MachOWriter::writeExportsTrieData() {
}
void MachOWriter::writeTail() {
- typedef void (MachOWriter::*WriteHandlerType)(void);
+ typedef void (MachOWriter::*WriteHandlerType)();
typedef std::pair<uint64_t, WriteHandlerType> WriteOperation;
SmallVector<WriteOperation, 7> Queue;
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