[PATCH] D116469: [AMDGPU][KnownBits] Correct the known bits calculation for MUL_I24.

[Craig Topper via Phabricator via llvm-commits]

craig.topper updated this revision to Diff 396912.
craig.topper added a comment.

Add KnownBits::countMinSignBits() unit test.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D116469/new/

https://reviews.llvm.org/D116469

Files:
  llvm/include/llvm/Support/KnownBits.h
  llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
  llvm/unittests/Support/KnownBitsTest.cpp


Index: llvm/unittests/Support/KnownBitsTest.cpp
===================================================================
--- llvm/unittests/Support/KnownBitsTest.cpp
+++ llvm/unittests/Support/KnownBitsTest.cpp
@@ -442,6 +442,17 @@
   });
 }
 
+TEST(KnownBitsTest, CountMinSignedBits) {
+  const unsigned Bits = 4;
+  ForeachKnownBits(Bits, [&](const KnownBits &Known) {
+    unsigned Expected = Bits;
+    ForeachNumInKnownBits(Known, [&](const APInt &N) {
+      Expected = std::min(Expected, N.getNumSignBits());
+    });
+    EXPECT_EQ(Expected, Known.countMinSignBits());
+  });
+}
+
 TEST(KnownBitsTest, SExtOrTrunc) {
   const unsigned NarrowerSize = 4;
   const unsigned BaseSize = 6;
Index: llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+++ llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
@@ -4626,11 +4626,12 @@
     RHSKnown = RHSKnown.trunc(24);
 
     if (Opc == AMDGPUISD::MUL_I24) {
-      unsigned LHSValBits = 24 - LHSKnown.countMinSignBits();
-      unsigned RHSValBits = 24 - RHSKnown.countMinSignBits();
-      unsigned MaxValBits = std::min(LHSValBits + RHSValBits, 32u);
-      if (MaxValBits >= 32)
+      unsigned LHSValBits = 24 - LHSKnown.countMinSignBits() + 1;
+      unsigned RHSValBits = 24 - RHSKnown.countMinSignBits() + 1;
+      unsigned MaxValBits = LHSValBits + RHSValBits;
+      if (MaxValBits > 32)
         break;
+      unsigned SignBits = 32 - MaxValBits + 1;
       bool LHSNegative = LHSKnown.isNegative();
       bool LHSNonNegative = LHSKnown.isNonNegative();
       bool LHSPositive = LHSKnown.isStrictlyPositive();
@@ -4639,9 +4640,9 @@
       bool RHSPositive = RHSKnown.isStrictlyPositive();
 
       if ((LHSNonNegative && RHSNonNegative) || (LHSNegative && RHSNegative))
-        Known.Zero.setHighBits(32 - MaxValBits);
+        Known.Zero.setHighBits(SignBits);
       else if ((LHSNegative && RHSPositive) || (LHSPositive && RHSNegative))
-        Known.One.setHighBits(32 - MaxValBits);
+        Known.One.setHighBits(SignBits);
     } else {
       unsigned LHSValBits = 24 - LHSKnown.countMinLeadingZeros();
       unsigned RHSValBits = 24 - RHSKnown.countMinLeadingZeros();
Index: llvm/include/llvm/Support/KnownBits.h
===================================================================
--- llvm/include/llvm/Support/KnownBits.h
+++ llvm/include/llvm/Support/KnownBits.h
@@ -249,7 +249,8 @@
       return countMinLeadingZeros();
     if (isNegative())
       return countMinLeadingOnes();
-    return 0;
+    // Every value has at least 1 sign bit.
+    return 1;
   }
 
   /// Returns the maximum number of trailing zero bits possible.


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